imageon: Invert HDMI TX clock

The ADV7511 samples the parallel data bus at the rising edge of sample
clock. Generate the clock so that the falling edge is aligned to updating
the bus data. This creates larger timing margins on each side of the
sampling edge and makes the design more robust.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2016-11-29 15:43:04 +01:00
parent 24cc8d284b
commit 84a76b9dea
1 changed files with 1 additions and 0 deletions

View File

@ -14,6 +14,7 @@ delete_bd_objs [get_bd_ports hdmi_data_e]
delete_bd_objs [get_bd_ports hdmi_data]
set_property CONFIG.EMBEDDED_SYNC {1} [get_bd_cells axi_hdmi_core]
set_property CONFIG.OUT_CLK_POLARITY {1} [get_bd_cells axi_hdmi_core]
create_bd_port -dir O hdmi_tx_clk
create_bd_port -dir O -from 15 -to 0 hdmi_tx_data