axi_gpreg: added constraints
parent
482b740229
commit
839e76996f
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@ -1,4 +1,8 @@
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set_property shreg_extract no [get_cells -hier -filter {name =~ *ad_rst_sync*}]
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set_false_path -from [get_cells -hier -filter {name =~ *up_d_preset_reg && IS_SEQUENTIAL}] \
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-to [get_cells -hier -filter {name =~ *ad_rst_sync_m1_reg && IS_SEQUENTIAL}]
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set_property shreg_extract no [get_cells -hier -filter {name =~ *ad_rst_sync*}]
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set_false_path -from [get_cells -hier -filter {name =~ *d_count_toggle_reg && IS_SEQUENTIAL}] -to [get_cells -hier -filter {name =~ *up_count_toggle_m1_reg && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *d_count_hold* && IS_SEQUENTIAL}] -to [get_cells -hier -filter {name =~ *up_d_count* && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *up_count_toggle_reg && IS_SEQUENTIAL}] -to [get_cells -hier -filter {name =~ *d_count_toggle_m1_reg && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *up_d_preset_reg && IS_SEQUENTIAL}] -to [get_cells -hier -filter {name =~ *ad_rst_sync_m1_reg && IS_SEQUENTIAL}]
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