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library/scripts: Add SV support for Intel boards 

Signed-off-by: Ionut Podgoreanu <ionut.podgoreanu@analog.com>
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Ionut Podgoreanu 2022-05-03 09:29:43 +01:00 committed by podgori
parent 8b9175a80c
commit 7faefab1be
1 changed files with 8 additions and 0 deletions
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8
library/scripts/adi_ip_intel.tcl
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@ -361,10 +361,18 @@ proc ad_ip_addfile {pname pfile} {
add_fileset_file $pmodule VERILOG PATH $pfile add_fileset_file $pmodule VERILOG PATH $pfile
return return
} }
if {$ptype eq ".sv"} {
add_fileset_file $pmodule SYSTEM_VERILOG PATH $pfile
return
}
if {$ptype eq ".vh"} { if {$ptype eq ".vh"} {
add_fileset_file $pmodule VERILOG_INCLUDE PATH $pfile add_fileset_file $pmodule VERILOG_INCLUDE PATH $pfile
return return
} }
if {$ptype eq ".svh"} {
add_fileset_file $pmodule SYSTEM_VERILOG_INCLUDE PATH $pfile
return
}
if {$ptype eq ".sdc"} { if {$ptype eq ".sdc"} {
add_fileset_file $pmodule SDC PATH $pfile add_fileset_file $pmodule SDC PATH $pfile
return return