axi_adxcvr_ip.tcl util_adxcvr_ip.tcl: Fixed asynchronous resets critical warnings in XCVR
parent
cfe0c0ced5
commit
7ed4955661
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@ -97,6 +97,8 @@ set_property VALUE ACTIVE_HIGH [ipx::get_bus_parameters POLARITY -of [ipx::get_b
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ipx::infer_bus_interface s_axi_aclk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface s_axi_aclk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface s_axi_aresetn xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface s_axi_aresetn xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::associate_bus_interfaces -clock s_axi_aclk -reset up_pll_rst -remove [ipx::current_core]
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set_property value s_axi:m_axi [ipx::get_bus_parameters ASSOCIATED_BUSIF \
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set_property value s_axi:m_axi [ipx::get_bus_parameters ASSOCIATED_BUSIF \
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-of_objects [ipx::get_bus_interfaces s_axi_aclk -of_objects [ipx::current_core]]]
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-of_objects [ipx::get_bus_interfaces s_axi_aclk -of_objects [ipx::current_core]]]
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@ -227,6 +227,14 @@ ipx::infer_bus_interface up_qpll_rst_4 xilinx.com:signal:reset_rtl:1.0 [ipx::cur
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ipx::infer_bus_interface up_qpll_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_qpll_rst_8 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_qpll_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface up_qpll_rst_12 xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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for {set n 0} {$n < 16} {incr n} {
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if {($n%4) == 0} {
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ipx::associate_bus_interfaces -clock cpll_ref_clk_${n} -reset up_qpll_rst_${n} -remove [ipx::current_core]
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}
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ipx::associate_bus_interfaces -clock cpll_ref_clk_${n} -reset up_cpll_rst_${n} -remove [ipx::current_core]
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}
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set_property driver_value 0 [ipx::get_ports -filter "direction==in" -of_objects [ipx::current_core]]
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set_property driver_value 0 [ipx::get_ports -filter "direction==in" -of_objects [ipx::current_core]]
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for {set n 0} {$n < 16} {incr n} {
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for {set n 0} {$n < 16} {incr n} {
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