zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

pzsdr1- cmos mode

main
Rejeesh Kutty 2016-04-11 15:58:29 -04:00
parent bf6ef4e5f3
commit 7e807d83b1
4 changed files with 417 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

78
projects/pzsdr1/ccbrk_cmos/Makefile Normal file
View File

@ -0,0 +1,78 @@
####################################################################################
####################################################################################
## Copyright 2011(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
####################################################################################
M_DEPS += system_top.v
M_DEPS += system_project.tcl
M_DEPS += system_constr.xdc
M_DEPS += system_bd.tcl
M_DEPS += ../common/ccbrk_bd.tcl
M_DEPS += ../../scripts/adi_project.tcl
M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../scripts/adi_board.tcl
M_DEPS += ../../fmcomms2/common/fmcomms2_bd.tcl
M_DEPS += ../../common/xilinx/sys_wfifo.tcl
M_DEPS += ../../common/pzsdr1/pzsdr1_system_constr.xdc
M_DEPS += ../../common/pzsdr1/pzsdr1_system_bd.tcl
M_DEPS += ../../common/pzsdr/pzsdr_system_ps7.tcl
M_DEPS += ../../../library/common/ad_iobuf.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361.xpr
M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr
M_DEPS += ../../../library/axi_gpreg/axi_gpreg.xpr
M_DEPS += ../../../library/util_cpack/util_cpack.xpr
M_DEPS += ../../../library/util_tdd_sync/util_tdd_sync.xpr
M_DEPS += ../../../library/util_upack/util_upack.xpr
M_DEPS += ../../../library/util_wfifo/util_wfifo.xpr
M_VIVADO := vivado -mode batch -source
M_FLIST := *.cache
M_FLIST += *.data
M_FLIST += *.xpr
M_FLIST += *.log
M_FLIST += *.jou
M_FLIST += xgui
M_FLIST += *.runs
M_FLIST += *.srcs
M_FLIST += *.sdk
M_FLIST += .Xil
.PHONY: all lib clean clean-all
all: lib ccbrk_pzsdr1.sdk/system_top.hdf
clean:
rm -rf $(M_FLIST)
clean-all:clean
make -C ../../../library/axi_ad9361 clean
make -C ../../../library/axi_dmac clean
make -C ../../../library/axi_gpreg clean
make -C ../../../library/util_cpack clean
make -C ../../../library/util_tdd_sync clean
make -C ../../../library/util_upack clean
make -C ../../../library/util_wfifo clean
ccbrk_pzsdr1.sdk/system_top.hdf: $(M_DEPS)
rm -rf $(M_FLIST)
$(M_VIVADO) system_project.tcl >> ccbrk_pzsdr1_vivado.log 2>&1
lib:
make -C ../../../library/axi_ad9361
make -C ../../../library/axi_dmac
make -C ../../../library/axi_gpreg
make -C ../../../library/util_cpack
make -C ../../../library/util_tdd_sync
make -C ../../../library/util_upack
make -C ../../../library/util_wfifo
####################################################################################
####################################################################################

48
projects/pzsdr1/ccbrk_cmos/system_bd.tcl Normal file
View File

@ -0,0 +1,48 @@
source $ad_hdl_dir/projects/common/pzsdr1/pzsdr1_system_bd.tcl
source ../common/ccbrk_bd.tcl
# CMOS Mode
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_clk_out_p]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_clk_out_n]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_frame_out_p]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_frame_out_n]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_data_out_p]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports tx_data_out_n]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_clk_in_p]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_clk_in_n]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_frame_in_p]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_frame_in_n]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_data_in_p]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports rx_data_in_n]]]
delete_bd_objs [get_bd_ports tx_clk_out_p]
delete_bd_objs [get_bd_ports tx_clk_out_n]
delete_bd_objs [get_bd_ports tx_frame_out_p]
delete_bd_objs [get_bd_ports tx_frame_out_n]
delete_bd_objs [get_bd_ports tx_data_out_p]
delete_bd_objs [get_bd_ports tx_data_out_n]
delete_bd_objs [get_bd_ports rx_clk_in_p]
delete_bd_objs [get_bd_ports rx_clk_in_n]
delete_bd_objs [get_bd_ports rx_frame_in_p]
delete_bd_objs [get_bd_ports rx_frame_in_n]
delete_bd_objs [get_bd_ports rx_data_in_p]
delete_bd_objs [get_bd_ports rx_data_in_n]
create_bd_port -dir I rx_clk_in
create_bd_port -dir I rx_frame_in
create_bd_port -dir I -from 11 -to 0 rx_data_in
create_bd_port -dir O tx_clk_out
create_bd_port -dir O tx_frame_out
create_bd_port -dir O -from 11 -to 0 tx_data_out
set_property CONFIG.CMOS_OR_LVDS_N 1 [get_bd_cells axi_ad9361]
ad_connect rx_clk_in axi_ad9361/rx_clk_in
ad_connect rx_frame_in axi_ad9361/rx_frame_in
ad_connect rx_data_in axi_ad9361/rx_data_in
ad_connect tx_clk_out axi_ad9361/tx_clk_out
ad_connect tx_frame_out axi_ad9361/tx_frame_out
ad_connect tx_data_out axi_ad9361/tx_data_out

18
projects/pzsdr1/ccbrk_cmos/system_project.tcl Normal file
View File

@ -0,0 +1,18 @@
source ../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_create ccbrk_cmos_pzsdr1
adi_project_files ccbrk_cmos_pzsdr1 [list \
"system_top.v" \
"../ccbrk/system_constr.xdc"\
"$ad_hdl_dir/library/common/ad_iobuf.v" \
"$ad_hdl_dir/projects/common/pzsdr1/pzsdr1_system_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr1/pzsdr1_cmos_system_constr.xdc" ]
adi_project_run ccbrk_cmos_pzsdr1

273
projects/pzsdr1/ccbrk_cmos/system_top.v Normal file
View File

@ -0,0 +1,273 @@
// ***************************************************************************
// ***************************************************************************
// Copyright 2011(c) Analog Devices, Inc.
//
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without modification,
// are permitted provided that the following conditions are met:
// - Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
// - Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in
// the documentation and/or other materials provided with the
// distribution.
// - Neither the name of Analog Devices, Inc. nor the names of its
// contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
// - The use of this software may or may not infringe the patent rights
// of one or more patent holders. This license does not release you
// from the requirement that you obtain separate licenses from these
// patent holders to use this software.
// - Use of the software either in source or binary form, must be run
// on or directly connected to an Analog Devices Inc. component.
//
// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
// PARTICULAR PURPOSE ARE DISCLAIMED.
//
// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ***************************************************************************
// ***************************************************************************
`timescale 1ns/100ps
module system_top (
ddr_addr,
ddr_ba,
ddr_cas_n,
ddr_ck_n,
ddr_ck_p,
ddr_cke,
ddr_cs_n,
ddr_dm,
ddr_dq,
ddr_dqs_n,
ddr_dqs_p,
ddr_odt,
ddr_ras_n,
ddr_reset_n,
ddr_we_n,
fixed_io_ddr_vrn,
fixed_io_ddr_vrp,
fixed_io_mio,
fixed_io_ps_clk,
fixed_io_ps_porb,
fixed_io_ps_srstb,
iic_scl,
iic_sda,
gpio_bd,
rx_clk_in,
rx_frame_in,
rx_data_in,
tx_clk_out,
tx_frame_out,
tx_data_out,
tx_gnd,
enable,
txnrx,
clk_out,
gpio_clksel,
gpio_resetb,
gpio_sync,
gpio_en_agc,
gpio_ctl,
gpio_status,
spi_csn,
spi_clk,
spi_mosi,
spi_miso,
gp_out,
gp_in,
gp_in_mio,
gp_in_open);
inout [14:0] ddr_addr;
inout [ 2:0] ddr_ba;
inout ddr_cas_n;
inout ddr_ck_n;
inout ddr_ck_p;
inout ddr_cke;
inout ddr_cs_n;
inout [ 3:0] ddr_dm;
inout [31:0] ddr_dq;
inout [ 3:0] ddr_dqs_n;
inout [ 3:0] ddr_dqs_p;
inout ddr_odt;
inout ddr_ras_n;
inout ddr_reset_n;
inout ddr_we_n;
inout fixed_io_ddr_vrn;
inout fixed_io_ddr_vrp;
inout [53:0] fixed_io_mio;
inout fixed_io_ps_clk;
inout fixed_io_ps_porb;
inout fixed_io_ps_srstb;
inout iic_scl;
inout iic_sda;
inout [ 3:0] gpio_bd;
input rx_clk_in;
input rx_frame_in;
input [11:0] rx_data_in;
output tx_clk_out;
output tx_frame_out;
output [11:0] tx_data_out;
output [ 1:0] tx_gnd;
output enable;
output txnrx;
input clk_out;
inout gpio_clksel;
inout gpio_resetb;
inout gpio_sync;
inout gpio_en_agc;
inout [ 3:0] gpio_ctl;
inout [ 7:0] gpio_status;
output spi_csn;
output spi_clk;
output spi_mosi;
input spi_miso;
output [26:0] gp_out;
input [26:0] gp_in;
input [ 2:0] gp_in_mio;
input [ 4:0] gp_in_open;
// internal signals
wire [63:0] gp_out_s;
wire [63:0] gp_in_s;
wire [63:0] gpio_i;
wire [63:0] gpio_o;
wire [63:0] gpio_t;
// assignments
assign tx_gnd = 2'd0;
assign gp_out[26:0] = gp_out_s[26:0];
assign gp_in_s[34:30] = gp_in_open;
assign gp_in_s[29:27] = gp_in_mio;
assign gp_in_s[26: 0] = gp_in;
// instantiations
ad_iobuf #(.DATA_WIDTH(16)) i_iobuf (
.dio_t ({gpio_t[51], gpio_t[46:32]}),
.dio_i ({gpio_o[51], gpio_o[46:32]}),
.dio_o ({gpio_i[51], gpio_i[46:32]}),
.dio_p ({ gpio_clksel, // 51:51
gpio_resetb, // 46:46
gpio_sync, // 45:45
gpio_en_agc, // 44:44
gpio_ctl, // 43:40
gpio_status})); // 39:32
ad_iobuf #(.DATA_WIDTH(4)) i_iobuf_bd (
.dio_t (gpio_t[3:0]),
.dio_i (gpio_o[3:0]),
.dio_o (gpio_i[3:0]),
.dio_p (gpio_bd));
system_wrapper i_system_wrapper (
.ddr_addr (ddr_addr),
.ddr_ba (ddr_ba),
.ddr_cas_n (ddr_cas_n),
.ddr_ck_n (ddr_ck_n),
.ddr_ck_p (ddr_ck_p),
.ddr_cke (ddr_cke),
.ddr_cs_n (ddr_cs_n),
.ddr_dm (ddr_dm),
.ddr_dq (ddr_dq),
.ddr_dqs_n (ddr_dqs_n),
.ddr_dqs_p (ddr_dqs_p),
.ddr_odt (ddr_odt),
.ddr_ras_n (ddr_ras_n),
.ddr_reset_n (ddr_reset_n),
.ddr_we_n (ddr_we_n),
.enable (enable),
.fixed_io_ddr_vrn (fixed_io_ddr_vrn),
.fixed_io_ddr_vrp (fixed_io_ddr_vrp),
.fixed_io_mio (fixed_io_mio),
.fixed_io_ps_clk (fixed_io_ps_clk),
.fixed_io_ps_porb (fixed_io_ps_porb),
.fixed_io_ps_srstb (fixed_io_ps_srstb),
.gp_in_0 (gp_in_s[31:0]),
.gp_in_1 (gp_in_s[63:32]),
.gp_out_0 (gp_out_s[31:0]),
.gp_out_1 (gp_out_s[63:32]),
.gpio_i (gpio_i),
.gpio_o (gpio_o),
.gpio_t (gpio_t),
.iic_main_scl_io (iic_scl),
.iic_main_sda_io (iic_sda),
.otg_vbusoc (1'b0),
.ps_intr_00 (1'b0),
.ps_intr_01 (1'b0),
.ps_intr_02 (1'b0),
.ps_intr_03 (1'b0),
.ps_intr_04 (1'b0),
.ps_intr_05 (1'b0),
.ps_intr_06 (1'b0),
.ps_intr_07 (1'b0),
.ps_intr_08 (1'b0),
.ps_intr_09 (1'b0),
.ps_intr_10 (1'b0),
.ps_intr_11 (1'b0),
.ps_intr_15 (1'b0),
.rx_clk_in (rx_clk_in),
.rx_data_in (rx_data_in),
.rx_frame_in (rx_frame_in),
.spi0_clk_i (1'b0),
.spi0_clk_o (spi_clk),
.spi0_csn_0_o (spi_csn),
.spi0_csn_1_o (),
.spi0_csn_2_o (),
.spi0_csn_i (1'b1),
.spi0_sdi_i (spi_miso),
.spi0_sdo_i (1'b0),
.spi0_sdo_o (spi_mosi),
.spi1_clk_i (1'b0),
.spi1_clk_o (),
.spi1_csn_0_o (),
.spi1_csn_1_o (),
.spi1_csn_2_o (),
.spi1_csn_i (1'b1),
.spi1_sdi_i (1'b0),
.spi1_sdo_i (1'b0),
.spi1_sdo_o (),
.tdd_sync_i (1'b0),
.tdd_sync_o (),
.tdd_sync_t (),
.tx_clk_out (tx_clk_out),
.tx_data_out (tx_data_out),
.tx_frame_out (tx_frame_out),
.txnrx (txnrx),
.up_enable (gpio_o[47]),
.up_txnrx (gpio_o[48]));
endmodule
// ***************************************************************************
// ***************************************************************************