ad_rst: Fix constraints for Intel designs
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e97d707f24
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7e599ce09c
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@ -1,6 +1,4 @@
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set_false_path -from [get_registers *up_*rst_async*] -to [get_registers *ad_rst:i_core_rst_reg|rst_sync_d]
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set_false_path -from [get_registers *up_*rst_async*] -to [get_registers *ad_rst:i_core_rst_reg|rstn]
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set_false_path -from [get_registers *up_core_preset] -to [get_registers *ad_rst:i_core_rst_reg|rst_async_d*]
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set_false_path -to [get_pins -hierarchical -nocase rst_async_d*|CLRN]
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set_false_path -to [get_pins -hierarchical -nocase rst_sync|CLRN]
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