library: added util_jesd_xmit
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// ***************************************************************************
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// ***************************************************************************
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// Copyright 2011(c) Analog Devices, Inc.
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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// - Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in
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// the documentation and/or other materials provided with the
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// distribution.
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// - Neither the name of Analog Devices, Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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// - The use of this software may or may not infringe the patent rights
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// of one or more patent holders. This license does not release you
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// from the requirement that you obtain separate licenses from these
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// patent holders to use this software.
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// - Use of the software either in source or binary form, must be run
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// on or directly connected to an Analog Devices Inc. component.
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//
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
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// PARTICULAR PURPOSE ARE DISCLAIMED.
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//
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// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
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// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ***************************************************************************
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// ***************************************************************************
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`timescale 1ns/100ps
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module util_jesd_xmit (
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// xcvr interface
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tx_clk,
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tx_data,
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tx_ip_data);
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// parameters
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parameter NUM_OF_LANES = 2;
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// xcvr interface
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input tx_clk;
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input [((NUM_OF_LANES*32)-1):0] tx_data;
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output [((NUM_OF_LANES*32)-1):0] tx_ip_data;
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// only for altera, xcvr+jesd
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genvar n;
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generate
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for (n = 0; n < NUM_OF_LANES; n = n + 1) begin: g_lane
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assign tx_ip_data[((n*32) + 31):((n*32) + 24)] = tx_data[((n*32) + 7):((n*32) + 0)];
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assign tx_ip_data[((n*32) + 23):((n*32) + 16)] = tx_data[((n*32) + 15):((n*32) + 8)];
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assign tx_ip_data[((n*32) + 15):((n*32) + 8)] = tx_data[((n*32) + 23):((n*32) + 16)];
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assign tx_ip_data[((n*32) + 7):((n*32) + 0)] = tx_data[((n*32) + 31):((n*32) + 24)];
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end
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endgenerate
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endmodule
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// ***************************************************************************
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// ***************************************************************************
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package require -exact qsys 13.0
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source ../scripts/adi_env.tcl
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source ../scripts/adi_ip_alt.tcl
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set_module_property NAME util_jesd_xmit
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set_module_property DESCRIPTION "JESD Xmit Utility"
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set_module_property VERSION 1.0
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set_module_property DISPLAY_NAME util_jesd_xmit
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set_module_property ELABORATION_CALLBACK p_util_jesd_xmit
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# files
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add_fileset quartus_synth QUARTUS_SYNTH "" "Quartus Synthesis"
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set_fileset_property quartus_synth TOP_LEVEL util_jesd_xmit
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add_fileset_file util_jesd_xmit.v VERILOG PATH util_jesd_xmit.v TOP_LEVEL_FILE
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# parameters
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add_parameter NUM_OF_LANES INTEGER 0
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set_parameter_property NUM_OF_LANES DEFAULT_VALUE 2
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set_parameter_property NUM_OF_LANES DISPLAY_NAME NUM_OF_LANES
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set_parameter_property NUM_OF_LANES TYPE INTEGER
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set_parameter_property NUM_OF_LANES UNITS None
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set_parameter_property NUM_OF_LANES HDL_PARAMETER true
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# transceiver interface
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add_interface if_tx_clk clock end
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add_interface_port if_tx_clk tx_clk clk Input 1
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add_interface if_tx_ip_data avalon_streaming start
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add_interface_port if_tx_ip_data tx_ip_data data Output 32*NUM_OF_LANES
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add_interface if_tx_data avalon_streaming end
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add_interface_port if_tx_data tx_data data Input 32*NUM_OF_LANES
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proc p_util_jesd_xmit {} {
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set p_num_of_lanes [get_parameter_value "NUM_OF_LANES"]
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set_interface_property if_tx_ip_data associatedClock if_tx_clk
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set_interface_property if_tx_ip_data dataBitsPerSymbol [expr (32*$p_num_of_lanes)]
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set_interface_property if_tx_data associatedClock if_tx_clk
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set_interface_property if_tx_data dataBitsPerSymbol [expr (32*$p_num_of_lanes)]
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}
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# ip
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source ../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip.tcl
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adi_ip_create util_jesd_xmit
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adi_ip_files util_jesd_xmit [list \
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"util_jesd_xmit.v" \
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"util_jesd_xmit_constr.xdc" ]
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adi_ip_properties_lite util_jesd_xmit
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adi_ip_constraints util_jesd_xmit [list \
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"util_jesd_xmit_constr.xdc" ]
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ipx::save_core [ipx::current_core]
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