imageon: ip automatic version update
parent
4bda0c3a1a
commit
79174422b6
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@ -13,8 +13,8 @@ delete_bd_objs [get_bd_ports hdmi_hsync]
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delete_bd_objs [get_bd_ports hdmi_data_e]
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delete_bd_objs [get_bd_ports hdmi_data]
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set_property CONFIG.EMBEDDED_SYNC {1} [get_bd_cells axi_hdmi_core]
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set_property CONFIG.OUT_CLK_POLARITY {1} [get_bd_cells axi_hdmi_core]
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ad_ip_parameter axi_hdmi_core CONFIG.EMBEDDED_SYNC 1
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ad_ip_parameter axi_hdmi_core CONFIG.OUT_CLK_POLARITY 1
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create_bd_port -dir O hdmi_tx_clk
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create_bd_port -dir O -from 15 -to 0 hdmi_tx_data
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@ -24,20 +24,20 @@ ad_connect hdmi_tx_data axi_hdmi_core/hdmi_16_es_data
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# adv7611
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set axi_hdmi_rx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_hdmi_rx:1.0 axi_hdmi_rx_core]
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ad_ip_instance axi_hdmi_rx axi_hdmi_rx_core
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set axi_hdmi_rx_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_hdmi_rx_dma]
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set_property -dict [list CONFIG.DMA_TYPE_SRC {2}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.CYCLIC {0}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.AXI_SLICE_SRC {1}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.AXI_SLICE_DEST {1}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.DMA_2D_TRANSFER {1}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.SYNC_TRANSFER_START {1}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.DMA_LENGTH_WIDTH {14}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {64}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_hdmi_rx_dma
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set_property -dict [list CONFIG.FIFO_SIZE {16}] $axi_hdmi_rx_dma
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ad_ip_instance axi_dmac axi_hdmi_rx_dma
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_TYPE_SRC 2
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_TYPE_DEST 0
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.CYCLIC 0
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.AXI_SLICE_SRC 1
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.AXI_SLICE_DEST 1
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_2D_TRANSFER 1
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.SYNC_TRANSFER_START 1
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_LENGTH_WIDTH 14
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_DATA_WIDTH_SRC 64
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_DATA_WIDTH_DEST 64
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ad_ip_parameter axi_hdmi_rx_dma CONFIG.FIFO_SIZE 16
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create_bd_port -dir I hdmi_rx_clk
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create_bd_port -dir I -from 15 -to 0 hdmi_rx_data
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@ -73,11 +73,11 @@ ad_connect spdif_tx axi_spdif_tx_core/spdif_tx_o
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create_bd_port -dir I spdif_rx
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set axi_spdif_rx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_spdif_rx:1.0 axi_spdif_rx_core]
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set_property -dict [list CONFIG.C_S_AXI_ADDR_WIDTH {16}] $axi_spdif_rx_core
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set_property -dict [list CONFIG.C_DMA_TYPE {1}] $axi_spdif_rx_core
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ad_ip_instance axi_spdif_rx axi_spdif_rx_core
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ad_ip_parameter axi_spdif_rx_core CONFIG.C_S_AXI_ADDR_WIDTH 16
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ad_ip_parameter axi_spdif_rx_core CONFIG.C_DMA_TYPE 1
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set_property -dict [list CONFIG.PCW_USE_DMA3 {1}] $sys_ps7
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_DMA3 1
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ad_connect sys_cpu_clk axi_spdif_rx_core/DMA_REQ_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA3_ACLK
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@ -90,9 +90,9 @@ ad_cpu_interconnect 0x75C20000 axi_spdif_rx_core
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# iic interface
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set axi_iic_imageon [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_iic:2.0 axi_iic_imageon]
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set_property -dict [list CONFIG.USE_BOARD_FLOW {true}] $axi_iic_imageon
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set_property -dict [list CONFIG.IIC_BOARD_INTERFACE {Custom}] $axi_iic_imageon
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ad_ip_instance axi_iic axi_iic_imageon
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ad_ip_parameter axi_iic_imageon CONFIG.USE_BOARD_FLOW true
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ad_ip_parameter axi_iic_imageon CONFIG.IIC_BOARD_INTERFACE Custom
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_imageon
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ad_connect iic_imageon axi_iic_imageon/iic
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