diff --git a/library/scripts/adi_ip.tcl b/library/scripts/adi_ip.tcl
index da3c453ca..91fbbd1e5 100644
--- a/library/scripts/adi_ip.tcl
+++ b/library/scripts/adi_ip.tcl
@@ -131,3 +131,33 @@ proc adi_add_bus {bus_name bus_type mode port_maps} {
 		adi_add_port_map $bus {*}$port_map
 	}
 }
+
+proc adi_add_bus_clock {clock_signal_name bus_inf_name {reset_signal_name ""}} {
+	set bus_inf_name_clean [string map {":" "_"} $bus_inf_name]
+	set clock_inf_name [format "%s%s" $bus_inf_name_clean "_signal_clock"]
+	set clock_inf [ipx::add_bus_interface $clock_inf_name [ipx::current_core]]
+	set_property abstraction_type_vlnv "xilinx.com:signal:clock_rtl:1.0" $clock_inf
+	set_property bus_type_vlnv "xilinx.com:signal:clock:1.0" $clock_inf
+	set_property display_name $clock_inf_name $clock_inf
+	set clock_map [ipx::add_port_map "CLK" $clock_inf]
+	set_property physical_name $clock_signal_name $clock_map
+
+	set assoc_busif [ipx::add_bus_parameter "ASSOCIATED_BUSIF" $clock_inf]
+	set_property value $bus_inf_name $assoc_busif
+
+	if { $reset_signal_name != "" } {
+		set assoc_reset [ipx::add_bus_parameter "ASSOCIATED_RESET" $clock_inf]
+		set_property value $reset_signal_name $assoc_reset
+
+		set reset_inf_name [format "%s%s" $bus_inf_name_clean "_signal_reset"]
+		set reset_inf [ipx::add_bus_interface $reset_inf_name [ipx::current_core]]
+		set_property abstraction_type_vlnv "xilinx.com:signal:reset_rtl:1.0" $reset_inf
+		set_property bus_type_vlnv "xilinx.com:signal:reset:1.0" $reset_inf
+		set_property display_name $reset_inf_name $reset_inf
+		set reset_map [ipx::add_port_map "RST" $reset_inf]
+		set_property physical_name $reset_signal_name $reset_map
+
+		set reset_polarity [ipx::add_bus_parameter "POLARITY" $reset_inf]
+		set_property value "ACTIVE_LOW" $reset_polarity
+	}
+}