From 72a23eeb71e58ad9eb7594a9bd350f2d83e5d3f4 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 24 Aug 2017 09:45:18 +0200 Subject: [PATCH] altera: adi_jesd204: Enable avmm_busy flag in the link FPLL register map To be able to check the FPLL re-configuration arbitration status from software enable the avmm_busy flag in the register map. Signed-off-by: Lars-Peter Clausen --- library/altera/adi_jesd204/adi_jesd204_hw.tcl | 1 + 1 file changed, 1 insertion(+) diff --git a/library/altera/adi_jesd204/adi_jesd204_hw.tcl b/library/altera/adi_jesd204/adi_jesd204_hw.tcl index 534536840..bc013f4cb 100644 --- a/library/altera/adi_jesd204/adi_jesd204_hw.tcl +++ b/library/altera/adi_jesd204/adi_jesd204_hw.tcl @@ -263,6 +263,7 @@ proc jesd204_compose {} { set_instance_parameter_value link_pll {enable_pll_reconfig} {1} set_instance_parameter_value link_pll {set_capability_reg_enable} {1} set_instance_parameter_value link_pll {set_csr_soft_logic_enable} {1} + set_instance_parameter_value link_pll {rcfg_separate_avmm_busy} {1} add_connection ref_clock.out_clk link_pll.pll_refclk0 add_instance link_clock altera_clock_bridge