a10gx: Updated base design to include MMU
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f3f5353944
commit
72151bb1a6
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@ -803,7 +803,7 @@
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<parameter name="mmu_TLBMissExcOffset" value="4096" />
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<parameter name="mmu_TLBMissExcSlave" value="sys_tlb_mem.s2" />
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<parameter name="mmu_autoAssignTlbPtrSz" value="false" />
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<parameter name="mmu_enabled" value="false" />
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<parameter name="mmu_enabled" value="true" />
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<parameter name="mmu_processIDNumBits" value="8" />
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<parameter name="mmu_ramBlockType" value="Automatic" />
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<parameter name="mmu_tlbNumWays" value="16" />
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