fmcomms2: Updated project

main
Adrian Costina 2015-03-13 12:49:17 +02:00
parent ea303c6f61
commit 70e1d13a7b
3 changed files with 96 additions and 93 deletions

View File

@ -1,4 +1,5 @@
source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl
source ../common/fmcomms2_bd.tcl source ../common/fmcomms2_bd.tcl

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@ -1,8 +1,7 @@
source ../../scripts/adi_env.tcl source ../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_create fmcomms2_zc702 adi_project_create fmcomms2_zc702
adi_project_files fmcomms2_zc702 [list \ adi_project_files fmcomms2_zc702 [list \

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@ -41,28 +41,28 @@
module system_top ( module system_top (
DDR_addr, ddr_addr,
DDR_ba, ddr_ba,
DDR_cas_n, ddr_cas_n,
DDR_ck_n, ddr_ck_n,
DDR_ck_p, ddr_ck_p,
DDR_cke, ddr_cke,
DDR_cs_n, ddr_cs_n,
DDR_dm, ddr_dm,
DDR_dq, ddr_dq,
DDR_dqs_n, ddr_dqs_n,
DDR_dqs_p, ddr_dqs_p,
DDR_odt, ddr_odt,
DDR_ras_n, ddr_ras_n,
DDR_reset_n, ddr_reset_n,
DDR_we_n, ddr_we_n,
FIXED_IO_ddr_vrn, fixed_io_ddr_vrn,
FIXED_IO_ddr_vrp, fixed_io_ddr_vrp,
FIXED_IO_mio, fixed_io_mio,
FIXED_IO_ps_clk, fixed_io_ps_clk,
FIXED_IO_ps_porb, fixed_io_ps_porb,
FIXED_IO_ps_srstb, fixed_io_ps_srstb,
gpio_bd, gpio_bd,
@ -103,28 +103,28 @@ module system_top (
spi_mosi, spi_mosi,
spi_miso); spi_miso);
inout [14:0] DDR_addr; inout [14:0] ddr_addr;
inout [ 2:0] DDR_ba; inout [ 2:0] ddr_ba;
inout DDR_cas_n; inout ddr_cas_n;
inout DDR_ck_n; inout ddr_ck_n;
inout DDR_ck_p; inout ddr_ck_p;
inout DDR_cke; inout ddr_cke;
inout DDR_cs_n; inout ddr_cs_n;
inout [ 3:0] DDR_dm; inout [ 3:0] ddr_dm;
inout [31:0] DDR_dq; inout [31:0] ddr_dq;
inout [ 3:0] DDR_dqs_n; inout [ 3:0] ddr_dqs_n;
inout [ 3:0] DDR_dqs_p; inout [ 3:0] ddr_dqs_p;
inout DDR_odt; inout ddr_odt;
inout DDR_ras_n; inout ddr_ras_n;
inout DDR_reset_n; inout ddr_reset_n;
inout DDR_we_n; inout ddr_we_n;
inout FIXED_IO_ddr_vrn; inout fixed_io_ddr_vrn;
inout FIXED_IO_ddr_vrp; inout fixed_io_ddr_vrp;
inout [53:0] FIXED_IO_mio; inout [53:0] fixed_io_mio;
inout FIXED_IO_ps_clk; inout fixed_io_ps_clk;
inout FIXED_IO_ps_porb; inout fixed_io_ps_porb;
inout FIXED_IO_ps_srstb; inout fixed_io_ps_srstb;
inout [15:0] gpio_bd; inout [15:0] gpio_bd;
@ -201,30 +201,30 @@ module system_top (
.dio(gpio_bd[7:4])); .dio(gpio_bd[7:4]));
system_wrapper i_system_wrapper ( system_wrapper i_system_wrapper (
.DDR_addr (DDR_addr), .ddr_addr (ddr_addr),
.DDR_ba (DDR_ba), .ddr_ba (ddr_ba),
.DDR_cas_n (DDR_cas_n), .ddr_cas_n (ddr_cas_n),
.DDR_ck_n (DDR_ck_n), .ddr_ck_n (ddr_ck_n),
.DDR_ck_p (DDR_ck_p), .ddr_ck_p (ddr_ck_p),
.DDR_cke (DDR_cke), .ddr_cke (ddr_cke),
.DDR_cs_n (DDR_cs_n), .ddr_cs_n (ddr_cs_n),
.DDR_dm (DDR_dm), .ddr_dm (ddr_dm),
.DDR_dq (DDR_dq), .ddr_dq (ddr_dq),
.DDR_dqs_n (DDR_dqs_n), .ddr_dqs_n (ddr_dqs_n),
.DDR_dqs_p (DDR_dqs_p), .ddr_dqs_p (ddr_dqs_p),
.DDR_odt (DDR_odt), .ddr_odt (ddr_odt),
.DDR_ras_n (DDR_ras_n), .ddr_ras_n (ddr_ras_n),
.DDR_reset_n (DDR_reset_n), .ddr_reset_n (ddr_reset_n),
.DDR_we_n (DDR_we_n), .ddr_we_n (ddr_we_n),
.FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn), .fixed_io_ddr_vrn (fixed_io_ddr_vrn),
.FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp), .fixed_io_ddr_vrp (fixed_io_ddr_vrp),
.FIXED_IO_mio (FIXED_IO_mio), .fixed_io_mio (fixed_io_mio),
.FIXED_IO_ps_clk (FIXED_IO_ps_clk), .fixed_io_ps_clk (fixed_io_ps_clk),
.FIXED_IO_ps_porb (FIXED_IO_ps_porb), .fixed_io_ps_porb (fixed_io_ps_porb),
.FIXED_IO_ps_srstb (FIXED_IO_ps_srstb), .fixed_io_ps_srstb (fixed_io_ps_srstb),
.GPIO_I (gpio_i), .gpio_i (gpio_i),
.GPIO_O (gpio_o), .gpio_o (gpio_o),
.GPIO_T (gpio_t), .gpio_t (gpio_t),
.hdmi_data (hdmi_data), .hdmi_data (hdmi_data),
.hdmi_data_e (hdmi_data_e), .hdmi_data_e (hdmi_data_e),
.hdmi_hsync (hdmi_hsync), .hdmi_hsync (hdmi_hsync),
@ -232,20 +232,20 @@ module system_top (
.hdmi_vsync (hdmi_vsync), .hdmi_vsync (hdmi_vsync),
.iic_main_scl_io (iic_scl), .iic_main_scl_io (iic_scl),
.iic_main_sda_io (iic_sda), .iic_main_sda_io (iic_sda),
.ps_intr_0 (ps_intrs[0]), .ps_intr_00 (ps_intrs[0]),
.ps_intr_1 (ps_intrs[1]), .ps_intr_01 (ps_intrs[1]),
.ps_intr_10 (ps_intrs[10]), .ps_intr_10 (ps_intrs[10]),
.ps_intr_11 (ps_intrs[11]), .ps_intr_11 (ps_intrs[11]),
.ps_intr_12 (ps_intrs[12]), .ps_intr_12 (ps_intrs[12]),
.ps_intr_13 (ps_intrs[13]), .ps_intr_13 (ps_intrs[13]),
.ps_intr_2 (ps_intrs[2]), .ps_intr_02 (ps_intrs[2]),
.ps_intr_3 (ps_intrs[3]), .ps_intr_03 (ps_intrs[3]),
.ps_intr_4 (ps_intrs[4]), .ps_intr_04 (ps_intrs[4]),
.ps_intr_5 (ps_intrs[5]), .ps_intr_05 (ps_intrs[5]),
.ps_intr_6 (ps_intrs[6]), .ps_intr_06 (ps_intrs[6]),
.ps_intr_7 (ps_intrs[7]), .ps_intr_07 (ps_intrs[7]),
.ps_intr_8 (ps_intrs[8]), .ps_intr_08 (ps_intrs[8]),
.ps_intr_9 (ps_intrs[9]), .ps_intr_09 (ps_intrs[9]),
.ad9361_dac_dma_irq (ps_intrs[12]), .ad9361_dac_dma_irq (ps_intrs[12]),
.ad9361_adc_dma_irq (ps_intrs[13]), .ad9361_adc_dma_irq (ps_intrs[13]),
.rx_clk_in_n (rx_clk_in_n), .rx_clk_in_n (rx_clk_in_n),
@ -255,27 +255,30 @@ module system_top (
.rx_frame_in_n (rx_frame_in_n), .rx_frame_in_n (rx_frame_in_n),
.rx_frame_in_p (rx_frame_in_p), .rx_frame_in_p (rx_frame_in_p),
.spdif (spdif), .spdif (spdif),
.spi_csn_i (1'b1), .spi0_csn_i (1'b1),
.spi_csn_o (spi_csn), .spi0_csn_0_o (spi_csn),
.spi_miso_i (spi_miso), .spi0_csn_1_o(),
.spi_mosi_i (1'b0), .spi0_csn_2_o(),
.spi_mosi_o (spi_mosi), .spi0_sdi_i (spi_miso),
.spi_sclk_i (1'b0), .spi0_sdo_i (1'b0),
.spi_sclk_o (spi_clk), .spi0_sdo_o (spi_mosi),
.spi0_clk_i (1'b0),
.spi0_clk_o (spi_clk),
.tx_clk_out_n (tx_clk_out_n), .tx_clk_out_n (tx_clk_out_n),
.tx_clk_out_p (tx_clk_out_p), .tx_clk_out_p (tx_clk_out_p),
.tx_data_out_n (tx_data_out_n), .tx_data_out_n (tx_data_out_n),
.tx_data_out_p (tx_data_out_p), .tx_data_out_p (tx_data_out_p),
.tx_frame_out_n (tx_frame_out_n), .tx_frame_out_n (tx_frame_out_n),
.tx_frame_out_p (tx_frame_out_p), .tx_frame_out_p (tx_frame_out_p),
.spi_udc_clk_i (1'b0), .spi1_clk_i (1'b0),
.spi_udc_clk_o (spi_udc_sclk), .spi1_clk_o (spi_udc_sclk),
.spi_udc_csn_i (1'b1), .spi1_csn_i (1'b1),
.spi_udc_csn_tx_o (spi_udc_csn_tx), .spi1_csn_0_o (spi_udc_csn_tx),
.spi_udc_csn_rx_o (spi_udc_csn_rx), .spi1_csn_1_o (spi_udc_csn_rx),
.spi_udc_mosi_i (spi_udc_data), .spi1_csn_2_o(),
.spi_udc_mosi_o (spi_udc_data), .spi1_sdo_i (spi_udc_data),
.spi_udc_miso_i (1'b0)); .spi1_sdo_o (spi_udc_data),
.spi1_sdi_i (1'b0));
endmodule endmodule