axi_dmac: patch for partial transfers support
This patch addresses the following issue: In case of transfers with multiple segments, if TLAST asserts on the last beat of a non-last segment while more descriptors are queued up, the completions for the queued segments may be missed causing timeout in processes that wait for transfer completions.main
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5e1100ee77
commit
6fae37504b
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@ -136,7 +136,7 @@ generate if (ALLOW_ABORT == 1) begin
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* A 'last' on the external interface indicates the end of an packet. If such a
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* 'last' indicator is observed before the end of the current transfer stop
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* accepting data on the external interface until a new descriptor is
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* received that is the first segment of a transfer.
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* received that is the first segment of a transfer.
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*/
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always @(posedge clk) begin
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if (resetn == 1'b0) begin
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@ -165,7 +165,7 @@ generate if (ALLOW_ABORT == 1) begin
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assign rewind_req_valid = early_tlast;
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assign rewind_req_data = {transfer_id,req_xlast_d,id_next};
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// The width of the id must fit the number of transfers that can be in flight
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// The width of the id must fit the number of transfers that can be in flight
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// in the burst memory
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always @(posedge clk) begin
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if (resetn == 1'b0) begin
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@ -196,8 +196,12 @@ end
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// If we want to support zero delay between transfers we have to assert
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// req_ready on the same cycle on which the last load happens.
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// In case early tlast happens accept the new descriptor only when the rewind
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// request got accepted.
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assign last_load = m_axi_valid && last_eot && eot;
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assign req_ready = last_load || ~active || (transfer_abort_s & rewind_req_ready);
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assign req_ready = (last_load && ~early_tlast) ||
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(~active && ~transfer_abort_s) ||
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(transfer_abort_s && rewind_req_ready);
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always @(posedge clk) begin
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if (req_ready) begin
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