ad_axis_inf_rx: Initialize output ports to avoid X propagation in simulation

main
Istvan Csomortani 2021-03-15 08:47:29 +00:00 committed by Mihaita Nagy
parent b9ac3a78a9
commit 6e97803437
1 changed files with 3 additions and 3 deletions

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@ -49,9 +49,9 @@ module ad_axis_inf_rx #(
// xilinx interface
output reg inf_valid,
output reg inf_last,
output reg [(DATA_WIDTH-1):0] inf_data,
output reg inf_valid = 1'b0,
output reg inf_last = 1'b0,
output reg [(DATA_WIDTH-1):0] inf_data = {DATA_WIDTH{1'b0}},
input inf_ready);
// internal registers