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common: Allow for the memory to be also symetrical

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Adrian Costina 2015-11-04 13:28:02 +02:00
parent ad1cef1441
commit 6cfc13a9dd
1 changed files with 8 additions and 0 deletions
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8
library/common/ad_mem_asym.v
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@ -81,6 +81,14 @@ module ad_mem_asym (
// write interface // write interface
generate generate
if (MEM_RATIO == 1) begin
always @(posedge clka) begin
if (wea == 1'b1) begin
m_ram[addra] <= dina;
end
end
end
if (MEM_RATIO == 2) begin if (MEM_RATIO == 2) begin
always @(posedge clka) begin always @(posedge clka) begin
if (wea == 1'b1) begin if (wea == 1'b1) begin