diff --git a/projects/motcon1_fmc/common/motcon1_fmc_bd.tcl b/projects/motcon1_fmc/common/motcon1_fmc_bd.tcl deleted file mode 100644 index e3003e052..000000000 --- a/projects/motcon1_fmc/common/motcon1_fmc_bd.tcl +++ /dev/null @@ -1,450 +0,0 @@ - - # motor control - - # position detection interface - - set position_i [ create_bd_port -dir I -from 2 -to 0 position_i ] - - # current monitor 1 interface - - set adc_ia_dat_i [ create_bd_port -dir I adc_ia_dat_i ] - set adc_ib_dat_i [ create_bd_port -dir I adc_ib_dat_i ] - set adc_it_dat_i [ create_bd_port -dir I adc_it_dat_i ] - set adc_vbus_dat_i [ create_bd_port -dir I adc_vbus_dat_i ] - set adc_ia_clk_o [ create_bd_port -dir O adc_ia_clk_o ] - set adc_ib_clk_o [ create_bd_port -dir O adc_ib_clk_o ] - set adc_it_clk_o [ create_bd_port -dir O adc_it_clk_o ] - set adc_vbus_clk_o [ create_bd_port -dir O adc_vbus_clk_o ] - - # cuurrent monitor 2 interface - - set adc_ia_dat_d_i [ create_bd_port -dir I adc_ia_dat_d_i ] - set adc_ib_dat_d_i [ create_bd_port -dir I adc_ib_dat_d_i ] - set adc_it_dat_d_i [ create_bd_port -dir I adc_it_dat_d_i ] - set adc_ia_clk_d_o [ create_bd_port -dir O adc_ia_clk_d_o ] - set adc_ib_clk_d_o [ create_bd_port -dir O adc_ib_clk_d_o ] - set adc_it_clk_d_o [ create_bd_port -dir O adc_it_clk_d_o ] - - # motor control interface - - set fmc_m1_fault_i [ create_bd_port -dir I fmc_m1_fault_i ] - set fmc_m1_en_o [ create_bd_port -dir O fmc_m1_en_o ] - - set pwm_al_o [ create_bd_port -dir O pwm_al_o] - set pwm_ah_o [ create_bd_port -dir O pwm_ah_o] - set pwm_cl_o [ create_bd_port -dir O pwm_cl_o] - set pwm_ch_o [ create_bd_port -dir O pwm_ch_o] - set pwm_bl_o [ create_bd_port -dir O pwm_bl_o] - set pwm_bh_o [ create_bd_port -dir O pwm_bh_o] - - # gpo interface - - set gpo_o [ create_bd_port -dir O -from 7 -to 0 gpo_o ] - - # interrupts - - set motcon1_c_m_1_irq [create_bd_port -dir O motcon1_c_m_1_irq] - set motcon1_c_m_2_irq [create_bd_port -dir O motcon1_c_m_2_irq] - set motcon1_s_d_irq [create_bd_port -dir O motcon1_s_d_irq] - set motcon1_ctrl_irq [create_bd_port -dir O motcon1_ctrl_irq] - - # xadc interface - - #create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 Vaux0 - #create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 Vaux8 - #create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 Vp_Vn - - #set muxaddr_out [ create_bd_port -dir O -from 4 -to 0 muxaddr_out ] - - # additions to default configuration - - set_property -dict [list CONFIG.NUM_MI {17}] $axi_cpu_interconnect - set_property -dict [list CONFIG.PCW_USE_S_AXI_HP1 {1} ] $sys_ps7 - set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1} ] $sys_ps7 - - # current monitor 1 peripherals - - set axi_mc_current_monitor_1 [ create_bd_cell -type ip -vlnv analog.com:user:axi_mc_current_monitor:1.0 axi_mc_current_monitor_1 ] - - set axi_current_monitor_1_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_current_monitor_1_dma] - set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $axi_current_monitor_1_dma - set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_current_monitor_1_dma - set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_current_monitor_1_dma - set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_current_monitor_1_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_current_monitor_1_dma - set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {1}] $axi_current_monitor_1_dma - - # current monitor 2 peripherals - - set axi_mc_current_monitor_2 [ create_bd_cell -type ip -vlnv analog.com:user:axi_mc_current_monitor:1.0 axi_mc_current_monitor_2 ] - - set axi_current_monitor_2_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_current_monitor_2_dma] - set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $axi_current_monitor_2_dma - set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_current_monitor_2_dma - set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_current_monitor_2_dma - set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_current_monitor_2_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_current_monitor_2_dma - set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {1}] $axi_current_monitor_2_dma - - # speed detector - - set axi_mc_speed_1 [ create_bd_cell -type ip -vlnv analog.com:user:axi_mc_speed:1.0 axi_mc_speed_1 ] - - set axi_speed_detector_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_speed_detector_dma] - set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $axi_speed_detector_dma - set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_speed_detector_dma - set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_speed_detector_dma - set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_speed_detector_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_speed_detector_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {32}] $axi_speed_detector_dma - - # controller - - set axi_mc_controller [ create_bd_cell -type ip -vlnv analog.com:user:axi_mc_controller:1.0 axi_mc_controller ] - - set foc_controller [ create_bd_cell -type ip -vlnv analog.com:user:controllerperipheralhdladi_pcore:1.0 foc_controller ] - - set axi_controller_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_controller_dma] - set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $axi_controller_dma - set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_controller_dma - set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_controller_dma - set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_controller_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_controller_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {256}] $axi_controller_dma - - # controller ILA - set ila_controller [ create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_controller ] - set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_controller - set_property -dict [ list CONFIG.C_ADV_TRIGGER {true} ] $ila_controller - set_property -dict [ list CONFIG.C_DATA_DEPTH {8192} ] $ila_controller - set_property -dict [ list CONFIG.C_EN_STRG_QUAL {1} ] $ila_controller - set_property -dict [ list CONFIG.C_NUM_OF_PROBES {10} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE0_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE1_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE2_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE3_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE4_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE5_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE6_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE7_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE8_WIDTH {32} ] $ila_controller - set_property -dict [ list CONFIG.C_PROBE9_WIDTH {1} ] $ila_controller - set_property -dict [ list CONFIG.C_TRIGIN_EN {false} ] $ila_controller - - #adc_pack - set util_adc_pack_0 [ create_bd_cell -type ip -vlnv analog.com:user:util_adc_pack:1.0 util_adc_pack_0 ] - set_property -dict [ list CONFIG.DATA_WIDTH {32} ] $util_adc_pack_0 - - # slice0 - set xlslice_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 xlslice_0 ] - set_property -dict [ list CONFIG.DIN_FROM {1} CONFIG.DIN_TO {1} CONFIG.DIN_WIDTH {3} ] $xlslice_0 - - # slice1 - set xlslice_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 xlslice_1 ] - set_property -dict [ list CONFIG.DIN_FROM {2} CONFIG.DIN_TO {2} CONFIG.DIN_WIDTH {3} ] $xlslice_1 - - # slice2 - set xlslice_2 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlslice:1.0 xlslice_2 ] - set_property -dict [ list CONFIG.DIN_FROM {0} CONFIG.DIN_TO {0} CONFIG.DIN_WIDTH {3} ] $xlslice_2 - - # xadc - -# set xadc_wiz_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:xadc_wiz:3.0 xadc_wiz_1 ] -# set_property -dict [ list CONFIG.XADC_STARUP_SELECTION {simultaneous_sampling} ] $xadc_wiz_1 -# set_property -dict [ list CONFIG.OT_ALARM {false} ] $xadc_wiz_1 -# set_property -dict [ list CONFIG.USER_TEMP_ALARM {false} ] $xadc_wiz_1 -# set_property -dict [ list CONFIG.VCCINT_ALARM {false} ] $xadc_wiz_1 -# set_property -dict [ list CONFIG.VCCAUX_ALARM {false} ] $xadc_wiz_1 -# set_property -dict [ list CONFIG.ENABLE_EXTERNAL_MUX {true} ] $xadc_wiz_1 -# set_property -dict [list CONFIG.EXTERNAL_MUX_CHANNEL {VAUXP0_VAUXN0}] $xadc_wiz_1 - - # additional interconnect - - set axi_mem_interconnect [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_mem_interconnect ] - set_property -dict [ list CONFIG.NUM_SI {4} CONFIG.NUM_MI {1} ] $axi_mem_interconnect - - # connections - - # position - - connect_bd_net -net position_i_1 [get_bd_ports position_i] [get_bd_pins axi_mc_speed_1/position_i] - connect_bd_net -net position_i_1 [get_bd_pins axi_mc_speed_1/bemf_i] - - # current monitor 1 - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_current_monitor_1/ref_clk] $sys_100m_clk_source - - connect_bd_net -net adc_ia_dat_i_1 [get_bd_ports adc_ia_dat_i] [get_bd_pins axi_mc_current_monitor_1/adc_ia_dat_i] - connect_bd_net -net adc_ib_dat_i_1 [get_bd_ports adc_ib_dat_i] [get_bd_pins axi_mc_current_monitor_1/adc_ib_dat_i] - connect_bd_net -net adc_it_dat_i_1 [get_bd_ports adc_it_dat_i] [get_bd_pins axi_mc_current_monitor_1/adc_it_dat_i] - connect_bd_net -net adc_vbus_dat_i_1 [get_bd_ports adc_vbus_dat_i] [get_bd_pins axi_mc_current_monitor_1/adc_vbus_dat_i] - - connect_bd_net -net axi_mc_current_monitor_1_adc_ia_clk_o [get_bd_ports adc_ia_clk_o] [get_bd_pins axi_mc_current_monitor_1/adc_ia_clk_o] - connect_bd_net -net axi_mc_current_monitor_1_adc_ib_clk_o [get_bd_ports adc_ib_clk_o] [get_bd_pins axi_mc_current_monitor_1/adc_ib_clk_o] - connect_bd_net -net axi_mc_current_monitor_1_adc_it_clk_o [get_bd_ports adc_it_clk_o] [get_bd_pins axi_mc_current_monitor_1/adc_it_clk_o] - connect_bd_net -net axi_mc_current_monitor_1_adc_vbus_clk_o [get_bd_ports adc_vbus_clk_o] [get_bd_pins axi_mc_current_monitor_1/adc_vbus_clk_o] - - connect_bd_net -net axi_mc_current_monitor_1_adc_clk [get_bd_pins axi_mc_current_monitor_1/adc_clk_o] [get_bd_pins axi_current_monitor_1_dma/fifo_wr_clk] - connect_bd_net -net axi_mc_current_monitor_1_adc_dwr [get_bd_pins axi_mc_current_monitor_1/adc_dwr_o] [get_bd_pins axi_current_monitor_1_dma/fifo_wr_en] - connect_bd_net -net axi_mc_current_monitor_1_adc_ddata [get_bd_pins axi_mc_current_monitor_1/adc_ddata_o] [get_bd_pins axi_current_monitor_1_dma/fifo_wr_din] - connect_bd_net -net axi_mc_current_monitor_1_adc_dsync [get_bd_pins axi_mc_current_monitor_1/adc_dsync_o] [get_bd_pins axi_current_monitor_1_dma/fifo_wr_sync] - connect_bd_net -net axi_mc_current_monitor_1_adc_dovf [get_bd_pins axi_mc_current_monitor_1/adc_dovf_i] [get_bd_pins axi_current_monitor_1_dma/fifo_wr_overflow] - - connect_bd_net -net axi_mc_current_monitor_1_ia_o [get_bd_pins axi_mc_current_monitor_1/ia_o] [get_bd_pins foc_controller/adc_current1] - connect_bd_net -net axi_mc_current_monitor_1_ib_o [get_bd_pins axi_mc_current_monitor_1/ib_o] [get_bd_pins foc_controller/adc_current2] - connect_bd_net -net axi_mc_current_monitor_1_i_ready_o [get_bd_pins axi_mc_controller/ctrl_data_valid_i] [get_bd_pins axi_mc_current_monitor_1/i_ready_o] - - # interrupt - - connect_bd_net -net axi_current_monitor_1_dma_irq [get_bd_pins axi_current_monitor_1_dma/irq] [get_bd_ports motcon1_c_m_1_irq] - - # current monitor 2 - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_current_monitor_2/ref_clk] $sys_100m_clk_source - - connect_bd_net -net adc_ia_dat_d_i [get_bd_ports adc_ia_dat_d_i] [get_bd_pins axi_mc_current_monitor_2/adc_ia_dat_i] - connect_bd_net -net axi_mc_current_monitor_2_adc_ia_clk_o [get_bd_ports adc_ia_clk_d_o] [get_bd_pins axi_mc_current_monitor_2/adc_ia_clk_o] - connect_bd_net -net adc_ib_dat_d_i [get_bd_ports adc_ib_dat_d_i] [get_bd_pins axi_mc_current_monitor_2/adc_ib_dat_i] - connect_bd_net -net axi_mc_current_monitor_2_adc_ib_clk_o [get_bd_ports adc_ib_clk_d_o] [get_bd_pins axi_mc_current_monitor_2/adc_ib_clk_o] - connect_bd_net -net adc_it_dat_d_i [get_bd_ports adc_it_dat_d_i] [get_bd_pins axi_mc_current_monitor_2/adc_it_dat_i] - connect_bd_net -net axi_mc_current_monitor_2_adc_it_clk_o [get_bd_ports adc_it_clk_d_o] [get_bd_pins axi_mc_current_monitor_2/adc_it_clk_o] - - connect_bd_net -net axi_mc_current_monitor_2_adc_clk [get_bd_pins axi_mc_current_monitor_2/adc_clk_o] [get_bd_pins axi_current_monitor_2_dma/fifo_wr_clk] - connect_bd_net -net axi_mc_current_monitor_2_adc_dwr [get_bd_pins axi_mc_current_monitor_2/adc_dwr_o] [get_bd_pins axi_current_monitor_2_dma/fifo_wr_en] - connect_bd_net -net axi_mc_current_monitor_2_adc_ddata [get_bd_pins axi_mc_current_monitor_2/adc_ddata_o] [get_bd_pins axi_current_monitor_2_dma/fifo_wr_din] - connect_bd_net -net axi_mc_current_monitor_2_adc_dsync [get_bd_pins axi_mc_current_monitor_2/adc_dsync_o] [get_bd_pins axi_current_monitor_2_dma/fifo_wr_sync] - connect_bd_net -net axi_mc_current_monitor_2_adc_dovf [get_bd_pins axi_mc_current_monitor_2/adc_dovf_i] [get_bd_pins axi_current_monitor_2_dma/fifo_wr_overflow] - - #interrupt - - connect_bd_net -net axi_current_monitor_2_dma_irq [get_bd_pins axi_current_monitor_2_dma/irq] [get_bd_ports motcon1_c_m_2_irq] - - # speed detector - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_speed_1/ref_clk] $sys_100m_clk_source - - connect_bd_net -net axi_mc_speed_1_position_o [get_bd_pins axi_mc_speed_1/position_o] [get_bd_pins axi_mc_controller/position_i] - - connect_bd_net -net speed_detector_adc_clk [get_bd_pins axi_mc_speed_1/adc_clk_o] [get_bd_pins axi_speed_detector_dma/fifo_wr_clk] - connect_bd_net -net speed_detector_adc_dwr [get_bd_pins axi_mc_speed_1/adc_dwr_o] [get_bd_pins axi_speed_detector_dma/fifo_wr_en] - connect_bd_net -net speed_detector_adc_ddata [get_bd_pins axi_mc_speed_1/adc_ddata_o] [get_bd_pins axi_speed_detector_dma/fifo_wr_din] - connect_bd_net -net speed_detector_adc_dovf [get_bd_pins axi_mc_speed_1/adc_dovf_i] [get_bd_pins axi_speed_detector_dma/fifo_wr_overflow] - - # interrupt - - connect_bd_net -net axi_speed_detector_dma_irq [get_bd_pins axi_speed_detector_dma/irq] [get_bd_ports motcon1_s_d_irq] - - # controller - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_controller/ref_clk] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_controller/ctrl_data_clk] $sys_100m_clk_source - - connect_bd_net -net axi_mc_controller_fmc_m1_en_o [get_bd_ports fmc_m1_en_o] [get_bd_pins axi_mc_controller/fmc_m1_en_o] - connect_bd_net -net axi_mc_controller_pwm_al_o [get_bd_ports pwm_al_o] [get_bd_pins axi_mc_controller/pwm_al_o] - connect_bd_net -net axi_mc_controller_pwm_ah_o [get_bd_ports pwm_ah_o] [get_bd_pins axi_mc_controller/pwm_ah_o] - connect_bd_net -net axi_mc_controller_pwm_cl_o [get_bd_ports pwm_cl_o] [get_bd_pins axi_mc_controller/pwm_cl_o] - connect_bd_net -net axi_mc_controller_pwm_ch_o [get_bd_ports pwm_ch_o] [get_bd_pins axi_mc_controller/pwm_ch_o] - connect_bd_net -net axi_mc_controller_pwm_bl_o [get_bd_ports pwm_bl_o] [get_bd_pins axi_mc_controller/pwm_bl_o] - connect_bd_net -net axi_mc_controller_pwm_bh_o [get_bd_ports pwm_bh_o] [get_bd_pins axi_mc_controller/pwm_bh_o] - connect_bd_net -net axi_mc_controller_gpo_o [get_bd_ports gpo_o] [get_bd_pins axi_mc_controller/gpo_o] - connect_bd_net -net axi_mc_controller_sensors_o [get_bd_pins axi_mc_controller/sensors_o] [get_bd_pins axi_mc_speed_1/hall_bemf_i] - connect_bd_net -net axi_mc_controller_fault [get_bd_pins /axi_mc_controller/fmc_m1_fault_i] [get_bd_ports /fmc_m1_fault_i] - - connect_bd_net -net axi_mc_controller_adc_clk_o [get_bd_pins axi_mc_controller/adc_clk_o] [get_bd_pins util_adc_pack_0/clk] - connect_bd_net -net axi_mc_controller_adc_data_c0 [get_bd_pins axi_mc_controller/adc_data_c0] [get_bd_pins util_adc_pack_0/chan_data_0] - connect_bd_net -net axi_mc_controller_adc_data_c1 [get_bd_pins axi_mc_controller/adc_data_c1] [get_bd_pins util_adc_pack_0/chan_data_1] - connect_bd_net -net axi_mc_controller_adc_data_c2 [get_bd_pins axi_mc_controller/adc_data_c2] [get_bd_pins util_adc_pack_0/chan_data_2] - connect_bd_net -net axi_mc_controller_adc_data_c3 [get_bd_pins axi_mc_controller/adc_data_c3] [get_bd_pins util_adc_pack_0/chan_data_3] - connect_bd_net -net axi_mc_controller_adc_data_c4 [get_bd_pins axi_mc_controller/adc_data_c4] [get_bd_pins util_adc_pack_0/chan_data_4] - connect_bd_net -net axi_mc_controller_adc_data_c5 [get_bd_pins axi_mc_controller/adc_data_c5] [get_bd_pins util_adc_pack_0/chan_data_5] - connect_bd_net -net axi_mc_controller_adc_data_c6 [get_bd_pins axi_mc_controller/adc_data_c6] [get_bd_pins util_adc_pack_0/chan_data_6] - connect_bd_net -net axi_mc_controller_adc_data_c7 [get_bd_pins axi_mc_controller/adc_data_c7] [get_bd_pins util_adc_pack_0/chan_data_7] - connect_bd_net -net axi_mc_controller_adc_enable_c0 [get_bd_pins axi_mc_controller/adc_enable_c0] [get_bd_pins util_adc_pack_0/chan_enable_0] - connect_bd_net -net axi_mc_controller_adc_enable_c1 [get_bd_pins axi_mc_controller/adc_enable_c1] [get_bd_pins util_adc_pack_0/chan_enable_1] - connect_bd_net -net axi_mc_controller_adc_enable_c2 [get_bd_pins axi_mc_controller/adc_enable_c2] [get_bd_pins util_adc_pack_0/chan_enable_2] - connect_bd_net -net axi_mc_controller_adc_enable_c3 [get_bd_pins axi_mc_controller/adc_enable_c3] [get_bd_pins util_adc_pack_0/chan_enable_3] - connect_bd_net -net axi_mc_controller_adc_enable_c4 [get_bd_pins axi_mc_controller/adc_enable_c4] [get_bd_pins util_adc_pack_0/chan_enable_4] - connect_bd_net -net axi_mc_controller_adc_enable_c5 [get_bd_pins axi_mc_controller/adc_enable_c5] [get_bd_pins util_adc_pack_0/chan_enable_5] - connect_bd_net -net axi_mc_controller_adc_enable_c6 [get_bd_pins axi_mc_controller/adc_enable_c6] [get_bd_pins util_adc_pack_0/chan_enable_6] - connect_bd_net -net axi_mc_controller_adc_enable_c7 [get_bd_pins axi_mc_controller/adc_enable_c7] [get_bd_pins util_adc_pack_0/chan_enable_7] - connect_bd_net -net axi_mc_controller_adc_valid_c0 [get_bd_pins axi_mc_controller/adc_valid_c0] [get_bd_pins util_adc_pack_0/chan_valid_0] - connect_bd_net -net axi_mc_controller_adc_valid_c1 [get_bd_pins axi_mc_controller/adc_valid_c1] [get_bd_pins util_adc_pack_0/chan_valid_1] - connect_bd_net -net axi_mc_controller_adc_valid_c2 [get_bd_pins axi_mc_controller/adc_valid_c2] [get_bd_pins util_adc_pack_0/chan_valid_2] - connect_bd_net -net axi_mc_controller_adc_valid_c3 [get_bd_pins axi_mc_controller/adc_valid_c3] [get_bd_pins util_adc_pack_0/chan_valid_3] - connect_bd_net -net axi_mc_controller_adc_valid_c4 [get_bd_pins axi_mc_controller/adc_valid_c4] [get_bd_pins util_adc_pack_0/chan_valid_4] - connect_bd_net -net axi_mc_controller_adc_valid_c5 [get_bd_pins axi_mc_controller/adc_valid_c5] [get_bd_pins util_adc_pack_0/chan_valid_5] - connect_bd_net -net axi_mc_controller_adc_valid_c6 [get_bd_pins axi_mc_controller/adc_valid_c6] [get_bd_pins util_adc_pack_0/chan_valid_6] - connect_bd_net -net axi_mc_controller_adc_valid_c7 [get_bd_pins axi_mc_controller/adc_valid_c7] [get_bd_pins util_adc_pack_0/chan_valid_7] - - connect_bd_net -net axi_mc_controller_adc_clk_o [get_bd_pins axi_controller_dma/fifo_wr_clk] - connect_bd_net -net axi_mc_controller_adc_ddata [get_bd_pins axi_controller_dma/fifo_wr_din] [get_bd_pins util_adc_pack_0/ddata] - connect_bd_net -net axi_mc_controller_adc_dovf [get_bd_pins axi_controller_dma/fifo_wr_overflow] [get_bd_pins axi_mc_controller/adc_dovf_i] - connect_bd_net -net axi_mc_controller_adc_dwr [get_bd_pins axi_controller_dma/fifo_wr_en] [get_bd_pins util_adc_pack_0/dvalid] - connect_bd_net -net util_adc_pack_0_dsync [get_bd_pins axi_controller_dma/fifo_wr_sync] [get_bd_pins util_adc_pack_0/dsync] - - #foc_controller - connect_bd_net -net sys_100m_clk [get_bd_pins foc_controller/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_ps7_FCLK_CLK2 [get_bd_pins foc_controller/IPCORE_CLK] [get_bd_pins sys_ps7/FCLK_CLK2] - - connect_bd_net -net sys_100m_resetn [get_bd_pins foc_controller/s_axi_aresetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins foc_controller/IPCORE_RESETN] $sys_100m_resetn_source - - connect_bd_net -net foc_controller_mon_d_current [get_bd_pins axi_mc_controller/ctrl_data6_i] - connect_bd_net -net foc_controller_mon_d_current [get_bd_pins foc_controller/mon_d_current] - - connect_bd_net -net foc_controller_pwm_a [get_bd_pins axi_mc_controller/pwm_a_i] [get_bd_pins foc_controller/pwm_a] - connect_bd_net -net foc_controller_pwm_b [get_bd_pins axi_mc_controller/pwm_b_i] [get_bd_pins foc_controller/pwm_b] - connect_bd_net -net foc_controller_pwm_c [get_bd_pins axi_mc_controller/pwm_c_i] [get_bd_pins foc_controller/pwm_c] - connect_bd_net -net xlslice_0_Dout [get_bd_pins foc_controller/encoder_a] [get_bd_pins xlslice_0/Dout] - connect_bd_net -net xlslice_1_Dout [get_bd_pins foc_controller/encoder_b] [get_bd_pins xlslice_1/Dout] - connect_bd_net -net xlslice_2_Dout [get_bd_pins foc_controller/encoder_index] [get_bd_pins xlslice_2/Dout] - connect_bd_net -net position_i_1 [get_bd_pins xlslice_1/Din] - connect_bd_net -net position_i_1 [get_bd_pins xlslice_0/Din] - connect_bd_net -net position_i_1 [get_bd_pins xlslice_2/Din] - - #ILA - connect_bd_net -net sys_100m_clk [get_bd_pins ila_controller/clk] $sys_100m_clk_source - connect_bd_net -net foc_controller_mon_phase_voltage_a [get_bd_pins axi_mc_controller/ctrl_data0_i] [get_bd_pins foc_controller/mon_phase_voltage_a] [get_bd_pins ila_controller/probe0] - connect_bd_net -net foc_controller_mon_phase_voltage_b [get_bd_pins axi_mc_controller/ctrl_data1_i] [get_bd_pins foc_controller/mon_phase_voltage_b] [get_bd_pins ila_controller/probe1] - connect_bd_net -net foc_controller_mon_phase_current_a [get_bd_pins axi_mc_controller/ctrl_data2_i] [get_bd_pins foc_controller/mon_phase_current_a] [get_bd_pins ila_controller/probe2] - connect_bd_net -net foc_controller_mon_phase_current_b [get_bd_pins axi_mc_controller/ctrl_data3_i] [get_bd_pins foc_controller/mon_phase_current_b] [get_bd_pins ila_controller/probe3] - connect_bd_net -net foc_controller_mon_rotor_position [get_bd_pins foc_controller/mon_rotor_position] [get_bd_pins ila_controller/probe4] - connect_bd_net -net foc_controller_mon_electrical_position [get_bd_pins axi_mc_controller/ctrl_data4_i] [get_bd_pins foc_controller/mon_electrical_position] [get_bd_pins ila_controller/probe5] - connect_bd_net -net foc_controller_mon_rotor_velocity [get_bd_pins axi_mc_controller/ctrl_data5_i] [get_bd_pins foc_controller/mon_rotor_velocity] [get_bd_pins ila_controller/probe6] - connect_bd_net -net foc_controller_mon_d_current [get_bd_pins ila_controller/probe7] - connect_bd_net -net foc_controller_mon_q_current [get_bd_pins axi_mc_controller/ctrl_data7_i] [get_bd_pins foc_controller/mon_q_current] [get_bd_pins ila_controller/probe8] - connect_bd_net -net axi_mc_current_monitor_1_i_ready_o [get_bd_pins ila_controller/probe9] - - # interrupt - - connect_bd_net -net axi_controller_dma_irq [get_bd_pins axi_controller_dma/irq] [get_bd_ports motcon1_ctrl_irq] - - # xadc - -# connect_bd_net -net sys_100m_clk [get_bd_pins xadc_wiz_1/s_axi_aclk] $sys_100m_clk_source -# connect_bd_net -net sys_100m_resetn [get_bd_pins xadc_wiz_1/s_axi_aresetn] $sys_100m_resetn_source - -# connect_bd_intf_net [get_bd_intf_pins xadc_wiz_1/Vp_Vn] [get_bd_intf_ports Vp_Vn] -# connect_bd_intf_net [get_bd_intf_pins xadc_wiz_1/Vaux0] [get_bd_intf_ports Vaux0] -# connect_bd_intf_net [get_bd_intf_pins xadc_wiz_1/Vaux8] [get_bd_intf_ports Vaux8] -# connect_bd_net -net xadc_wiz_1_muxaddr_out [get_bd_ports muxaddr_out] [get_bd_pins xadc_wiz_1/muxaddr_out] - - # interconnect (cpu) - - connect_bd_intf_net -intf_net axi_cpu_interconnect_m07_axi [get_bd_intf_pins axi_cpu_interconnect/M07_AXI] [get_bd_intf_pins axi_mc_current_monitor_1/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m08_axi [get_bd_intf_pins axi_cpu_interconnect/M08_AXI] [get_bd_intf_pins axi_mc_speed_1/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m09_axi [get_bd_intf_pins axi_cpu_interconnect/M09_AXI] [get_bd_intf_pins axi_mc_controller/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m10_axi [get_bd_intf_pins axi_cpu_interconnect/M10_AXI] [get_bd_intf_pins axi_mc_current_monitor_2/s_axi] -# connect_bd_intf_net -intf_net axi_cpu_interconnect_m11_axi [get_bd_intf_pins axi_cpu_interconnect/M11_AXI] [get_bd_intf_pins xadc_wiz_1/s_axi_lite] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m12_axi [get_bd_intf_pins axi_cpu_interconnect/M12_AXI] [get_bd_intf_pins axi_speed_detector_dma/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m13_axi [get_bd_intf_pins axi_cpu_interconnect/M13_AXI] [get_bd_intf_pins axi_current_monitor_1_dma/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m14_axi [get_bd_intf_pins axi_cpu_interconnect/M14_AXI] [get_bd_intf_pins axi_current_monitor_2_dma/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m15_axi [get_bd_intf_pins axi_cpu_interconnect/M15_AXI] [get_bd_intf_pins axi_controller_dma/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m16_axi [get_bd_intf_pins axi_cpu_interconnect/M16_AXI] [get_bd_intf_pins foc_controller/s_axi] - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M10_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M11_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M12_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M13_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M14_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M15_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M16_ACLK] $sys_100m_clk_source - - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M10_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M11_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M12_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M13_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M14_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M15_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M16_ARESETN] $sys_100m_resetn_source - - #inteconnects (current monitor 1) - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_current_monitor_1/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mc_current_monitor_1/s_axi_aresetn] $sys_100m_resetn_source - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_current_monitor_1_dma/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_current_monitor_1_dma/s_axi_aresetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_current_monitor_1_dma/m_dest_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_current_monitor_1_dma/m_dest_axi_aresetn] $sys_100m_resetn_source - - connect_bd_intf_net -intf_net axi_mem_interconnect_s01_axi [get_bd_intf_pins axi_mem_interconnect/S01_AXI] [get_bd_intf_pins axi_current_monitor_1_dma/m_dest_axi] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mem_interconnect/S01_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/S01_ARESETN] $sys_100m_resetn_source - - #interconnect (current monitor 2) - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_current_monitor_2/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mc_current_monitor_2/s_axi_aresetn] $sys_100m_resetn_source - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_current_monitor_2_dma/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_current_monitor_2_dma/s_axi_aresetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_current_monitor_2_dma/m_dest_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_current_monitor_2_dma/m_dest_axi_aresetn] $sys_100m_resetn_source - - connect_bd_intf_net -intf_net axi_mem_interconnect_s02_axi [get_bd_intf_pins axi_mem_interconnect/S02_AXI] [get_bd_intf_pins axi_current_monitor_2_dma/m_dest_axi] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mem_interconnect/S02_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/S02_ARESETN] $sys_100m_resetn_source - - # interconnect (speed detector) - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_speed_1/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mc_speed_1/s_axi_aresetn] $sys_100m_resetn_source - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_speed_detector_dma/m_dest_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_speed_detector_dma/s_axi_aresetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_speed_detector_dma/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_speed_detector_dma/m_dest_axi_aresetn] $sys_100m_resetn_source - - connect_bd_intf_net -intf_net axi_mem_interconnect_s00_axi [get_bd_intf_pins axi_mem_interconnect/S00_AXI] [get_bd_intf_pins axi_speed_detector_dma/m_dest_axi] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mem_interconnect/S00_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/S00_ARESETN] $sys_100m_resetn_source - - # interconnect (controller) - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mc_controller/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mc_controller/s_axi_aresetn] $sys_100m_resetn_source - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_controller_dma/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_controller_dma/s_axi_aresetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_controller_dma/m_dest_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_controller_dma/m_dest_axi_aresetn] $sys_100m_resetn_source - - connect_bd_intf_net -intf_net axi_mem_interconnect_s03_axi [get_bd_intf_pins axi_mem_interconnect/S03_AXI] [get_bd_intf_pins axi_controller_dma/m_dest_axi] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mem_interconnect/S03_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/S03_ARESETN] $sys_100m_resetn_source - - # interconnect (dmas) - - connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/S_AXI_HP1_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mem_interconnect/ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_mem_interconnect/M00_ACLK] $sys_100m_clk_source - - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_mem_interconnect/M00_ARESETN] $sys_100m_resetn_source - - connect_bd_intf_net -intf_net axi_mem_interconnect_m00_axi [get_bd_intf_pins axi_mem_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP1] - - # address map - - create_bd_addr_seg -range 0x10000 -offset 0x40400000 $sys_addr_cntrl_space [get_bd_addr_segs axi_current_monitor_1_dma/s_axi/axi_lite] SEG_data_c_m_1_dma - create_bd_addr_seg -range 0x10000 -offset 0x40410000 $sys_addr_cntrl_space [get_bd_addr_segs axi_speed_detector_dma/s_axi/axi_lite] SEG_data_s_d_dma - create_bd_addr_seg -range 0x10000 -offset 0x40420000 $sys_addr_cntrl_space [get_bd_addr_segs axi_controller_dma/s_axi/axi_lite] SEG_data_t_c_dma - create_bd_addr_seg -range 0x10000 -offset 0x40430000 $sys_addr_cntrl_space [get_bd_addr_segs axi_current_monitor_2_dma/s_axi/axi_lite] SEG_data_c_m_2_dma - create_bd_addr_seg -range 0x10000 -offset 0x40500000 $sys_addr_cntrl_space [get_bd_addr_segs axi_mc_current_monitor_1/s_axi/axi_lite] SEG_data_c_m_1 - create_bd_addr_seg -range 0x10000 -offset 0x40510000 $sys_addr_cntrl_space [get_bd_addr_segs axi_mc_speed_1/s_axi/axi_lite] SEG_data_s_d - create_bd_addr_seg -range 0x10000 -offset 0x40520000 $sys_addr_cntrl_space [get_bd_addr_segs axi_mc_controller/s_axi/axi_lite] SEG_data_t_c - create_bd_addr_seg -range 0x10000 -offset 0x40530000 $sys_addr_cntrl_space [get_bd_addr_segs axi_mc_current_monitor_2/s_axi/axi_lite] SEG_data_c_m_2 -# create_bd_addr_seg -range 0x10000 -offset 0x43200000 $sys_addr_cntrl_space [get_bd_addr_segs xadc_wiz_1/s_axi_lite/Reg] SEG_data_xadc - create_bd_addr_seg -range 0x4000000 -offset 0x7C000000 $sys_addr_cntrl_space [get_bd_addr_segs foc_controller/s_axi/axi_lite] SEG_foc_controller_f_c - - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_current_monitor_1_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_speed_detector_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_controller_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_current_monitor_2_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm diff --git a/projects/motcon1_fmc/zed/system_bd.tcl b/projects/motcon1_fmc/zed/system_bd.tcl deleted file mode 100644 index 5aa5d84ab..000000000 --- a/projects/motcon1_fmc/zed/system_bd.tcl +++ /dev/null @@ -1,5 +0,0 @@ - - - source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl - source ../common/motcon1_fmc_bd.tcl - diff --git a/projects/motcon1_fmc/zed/system_constr.xdc b/projects/motcon1_fmc/zed/system_constr.xdc deleted file mode 100644 index 131902b29..000000000 --- a/projects/motcon1_fmc/zed/system_constr.xdc +++ /dev/null @@ -1,86 +0,0 @@ -# Motor Control - -set_property PACKAGE_PIN J16 [get_ports {position_i[0]}] -set_property IOSTANDARD LVCMOS25 [get_ports {position_i[0]}] -set_property PACKAGE_PIN J17 [get_ports {position_i[1]}] -set_property IOSTANDARD LVCMOS25 [get_ports {position_i[1]}] -set_property PACKAGE_PIN G15 [get_ports {position_i[2]}] -set_property IOSTANDARD LVCMOS25 [get_ports {position_i[2]}] - -set_property PACKAGE_PIN A16 [get_ports pwm_ah_o] -set_property IOSTANDARD LVCMOS25 [get_ports pwm_ah_o] -set_property PACKAGE_PIN A17 [get_ports pwm_al_o] -set_property IOSTANDARD LVCMOS25 [get_ports pwm_al_o] -set_property PACKAGE_PIN C15 [get_ports pwm_bh_o] -set_property IOSTANDARD LVCMOS25 [get_ports pwm_bh_o] -set_property PACKAGE_PIN B15 [get_ports pwm_bl_o] -set_property IOSTANDARD LVCMOS25 [get_ports pwm_bl_o] -set_property PACKAGE_PIN A21 [get_ports pwm_ch_o] -set_property IOSTANDARD LVCMOS25 [get_ports pwm_ch_o] -set_property PACKAGE_PIN A22 [get_ports pwm_cl_o] -set_property IOSTANDARD LVCMOS25 [get_ports pwm_cl_o] -set_property PACKAGE_PIN L21 [get_ports fmc_m1_en_o] -set_property IOSTANDARD LVCMOS25 [get_ports fmc_m1_en_o] -set_property PACKAGE_PIN L22 [get_ports fmc_m1_fault_i] -set_property IOSTANDARD LVCMOS25 [get_ports fmc_m1_fault_i] - -set_property PACKAGE_PIN T16 [get_ports adc_ia_dat_i] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ia_dat_i] -set_property PACKAGE_PIN T17 [get_ports adc_ib_dat_i] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ib_dat_i] -set_property PACKAGE_PIN N17 [get_ports adc_it_dat_i] -set_property IOSTANDARD LVCMOS25 [get_ports adc_it_dat_i] -set_property PACKAGE_PIN N18 [get_ports adc_vbus_dat_i] -set_property IOSTANDARD LVCMOS25 [get_ports adc_vbus_dat_i] - -set_property PACKAGE_PIN P17 [get_ports adc_ia_clk_o] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ia_clk_o] -set_property PACKAGE_PIN P18 [get_ports adc_ib_clk_o] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ib_clk_o] -set_property PACKAGE_PIN M21 [get_ports adc_it_clk_o] -set_property IOSTANDARD LVCMOS25 [get_ports adc_it_clk_o] -set_property PACKAGE_PIN M22 [get_ports adc_vbus_clk_o] -set_property IOSTANDARD LVCMOS25 [get_ports adc_vbus_clk_o] - -set_property PACKAGE_PIN A18 [get_ports {gpo_o[0]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[0]}] -set_property PACKAGE_PIN A19 [get_ports {gpo_o[1]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[1]}] -set_property PACKAGE_PIN R19 [get_ports {gpo_o[2]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[2]}] -set_property PACKAGE_PIN T19 [get_ports {gpo_o[3]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[3]}] -set_property PACKAGE_PIN D21 [get_ports {gpo_o[4]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[4]}] -set_property PACKAGE_PIN J22 [get_ports {gpo_o[5]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[5]}] -set_property PACKAGE_PIN G16 [get_ports {gpo_o[6]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[6]}] -set_property PACKAGE_PIN M19 [get_ports {gpo_o[7]}] -set_property IOSTANDARD LVCMOS25 [get_ports {gpo_o[7]}] - -set_property PACKAGE_PIN B17 [get_ports adc_ia_dat_d_i] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ia_dat_d_i] -set_property PACKAGE_PIN B21 [get_ports adc_ib_dat_d_i] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ib_dat_d_i] -set_property PACKAGE_PIN B22 [get_ports adc_it_dat_d_i] -set_property IOSTANDARD LVCMOS25 [get_ports adc_it_dat_d_i] - -set_property PACKAGE_PIN D20 [get_ports adc_ia_clk_d_o] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ia_clk_d_o] -set_property PACKAGE_PIN C20 [get_ports adc_ib_clk_d_o] -set_property IOSTANDARD LVCMOS25 [get_ports adc_ib_clk_d_o] -set_property PACKAGE_PIN E21 [get_ports adc_it_clk_d_o] -set_property IOSTANDARD LVCMOS25 [get_ports adc_it_clk_d_o] - - -#set_property PACKAGE_PIN H15 [get_ports {muxaddr_out[0]}] -#set_property IOSTANDARD LVCMOS25 [get_ports {muxaddr_out[0]}] -#set_property PACKAGE_PIN R15 [get_ports {muxaddr_out[1]}] -#set_property IOSTANDARD LVCMOS25 [get_ports {muxaddr_out[1]}] -#set_property PACKAGE_PIN K15 [get_ports {muxaddr_out[2]}] -#set_property IOSTANDARD LVCMOS25 [get_ports {muxaddr_out[2]}] -#set_property PACKAGE_PIN J15 [get_ports {muxaddr_out[3]}] -#set_property IOSTANDARD LVCMOS25 [get_ports {muxaddr_out[3]}] - -set_false_path -through [get_pins {i_system_wrapper/system_i/foc_controller/inst*/*/*/*}] diff --git a/projects/motcon1_fmc/zed/system_project.tcl b/projects/motcon1_fmc/zed/system_project.tcl deleted file mode 100644 index dcbbc9420..000000000 --- a/projects/motcon1_fmc/zed/system_project.tcl +++ /dev/null @@ -1,14 +0,0 @@ - -source ../../scripts/adi_env.tcl -source $ad_hdl_dir/projects/scripts/adi_project.tcl - -adi_project_create motcon1_fmc_zed -adi_project_files motcon1_fmc_zed [list \ - "system_top.v" \ - "system_constr.xdc" \ - "$ad_hdl_dir/library/common/ad_iobuf.v" \ - "$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc" ] - -adi_project_run motcon1_fmc_zed - - diff --git a/projects/motcon1_fmc/zed/system_top.v b/projects/motcon1_fmc/zed/system_top.v deleted file mode 100644 index 5d38ff5ae..000000000 --- a/projects/motcon1_fmc/zed/system_top.v +++ /dev/null @@ -1,341 +0,0 @@ -// *************************************************************************** -// *************************************************************************** -// Copyright 2014(c) Analog Devices, Inc. -// -// All rights reserved. -// -// Redistribution and use in source and binary forms, with or without modification, -// are permitted provided that the following conditions are met: -// - Redistributions of source code must retain the above copyright -// notice, this list of conditions and the following disclaimer. -// - Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in -// the documentation and/or other materials provided with the -// distribution. -// - Neither the name of Analog Devices, Inc. nor the names of its -// contributors may be used to endorse or promote products derived -// from this software without specific prior written permission. -// - The use of this software may or may not infringe the patent rights -// of one or more patent holders. This license does not release you -// from the requirement that you obtain separate licenses from these -// patent holders to use this software. -// - Use of the software either in source or binary form, must be run -// on or directly connected to an Analog Devices Inc. component. -// -// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A -// PARTICULAR PURPOSE ARE DISCLAIMED. -// -// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, -// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY -// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF -// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// *************************************************************************** -// *************************************************************************** -// *************************************************************************** -// *************************************************************************** - -`timescale 1ns/100ps - -module system_top ( - - DDR_addr, - DDR_ba, - DDR_cas_n, - DDR_ck_n, - DDR_ck_p, - DDR_cke, - DDR_cs_n, - DDR_dm, - DDR_dq, - DDR_dqs_n, - DDR_dqs_p, - DDR_odt, - DDR_ras_n, - DDR_reset_n, - DDR_we_n, - - FIXED_IO_ddr_vrn, - FIXED_IO_ddr_vrp, - FIXED_IO_mio, - FIXED_IO_ps_clk, - FIXED_IO_ps_porb, - FIXED_IO_ps_srstb, - - gpio_bd, - - hdmi_out_clk, - hdmi_vsync, - hdmi_hsync, - hdmi_data_e, - hdmi_data, - - adc_ia_clk_d_o, - adc_ia_clk_o, - adc_ia_dat_d_i, - adc_ia_dat_i, - adc_ib_clk_d_o, - adc_ib_clk_o, - adc_ib_dat_d_i, - adc_ib_dat_i, - adc_it_clk_d_o, - adc_it_clk_o, - adc_it_dat_d_i, - adc_it_dat_i, - adc_vbus_clk_o, - adc_vbus_dat_i, - fmc_m1_en_o, - fmc_m1_fault_i, - gpo_o, - position_i, - pwm_ah_o, - pwm_al_o, - pwm_bh_o, - pwm_bl_o, - pwm_ch_o, - pwm_cl_o, - - //vauxn0, - //vauxn8, - //vauxp0, - //vauxp8, - //vn_in, - //vp_in, - //muxaddr_out, - - i2s_mclk, - i2s_bclk, - i2s_lrclk, - i2s_sdata_out, - i2s_sdata_in, - - spdif, - - iic_scl, - iic_sda, - iic_mux_scl, - iic_mux_sda, - - otg_vbusoc); - - inout [14:0] DDR_addr; - inout [ 2:0] DDR_ba; - inout DDR_cas_n; - inout DDR_ck_n; - inout DDR_ck_p; - inout DDR_cke; - inout DDR_cs_n; - inout [ 3:0] DDR_dm; - inout [31:0] DDR_dq; - inout [ 3:0] DDR_dqs_n; - inout [ 3:0] DDR_dqs_p; - inout DDR_odt; - inout DDR_ras_n; - inout DDR_reset_n; - inout DDR_we_n; - - inout FIXED_IO_ddr_vrn; - inout FIXED_IO_ddr_vrp; - inout [53:0] FIXED_IO_mio; - inout FIXED_IO_ps_clk; - inout FIXED_IO_ps_porb; - inout FIXED_IO_ps_srstb; - - inout [31:0] gpio_bd; - - output hdmi_out_clk; - output hdmi_vsync; - output hdmi_hsync; - output hdmi_data_e; - output [15:0] hdmi_data; - - output adc_ia_clk_d_o; - output adc_ia_clk_o; - input adc_ia_dat_d_i; - input adc_ia_dat_i; - output adc_ib_clk_d_o; - output adc_ib_clk_o; - input adc_ib_dat_d_i; - input adc_ib_dat_i; - output adc_it_clk_d_o; - output adc_it_clk_o; - input adc_it_dat_d_i; - input adc_it_dat_i; - output adc_vbus_clk_o; - input adc_vbus_dat_i; - output fmc_m1_en_o; - input fmc_m1_fault_i; - output [7:0] gpo_o; - input [2:0] position_i; - output pwm_ah_o; - output pwm_al_o; - output pwm_bh_o; - output pwm_bl_o; - output pwm_ch_o; - output pwm_cl_o; - - //input vauxn0; - //input vauxn8; - //input vauxp0; - //input vauxp8; - //input vn_in; - //input vp_in; - //output [3:0] muxaddr_out; - - output spdif; - - output i2s_mclk; - output i2s_bclk; - output i2s_lrclk; - output i2s_sdata_out; - input i2s_sdata_in; - - - inout iic_scl; - inout iic_sda; - inout [ 1:0] iic_mux_scl; - inout [ 1:0] iic_mux_sda; - - input otg_vbusoc; - - // internal signals - - wire [31:0] gpio_i; - wire [31:0] gpio_o; - wire [31:0] gpio_t; - wire [ 1:0] iic_mux_scl_i_s; - wire [ 1:0] iic_mux_scl_o_s; - wire iic_mux_scl_t_s; - wire [ 1:0] iic_mux_sda_i_s; - wire [ 1:0] iic_mux_sda_o_s; - wire iic_mux_sda_t_s; - wire [15:0] ps_intrs; - - // instantiations - - ad_iobuf #( - .DATA_WIDTH(32)) - i_gpio_bd ( - .dt(gpio_t), - .di(gpio_o), - .do(gpio_i), - .dio(gpio_bd)); - - ad_iobuf #( - .DATA_WIDTH(2)) - i_iic_mux_scl ( - .dt({iic_mux_scl_t_s, iic_mux_scl_t_s}), - .di(iic_mux_scl_o_s), - .do(iic_mux_scl_i_s), - .dio(iic_mux_scl)); - - ad_iobuf #( - .DATA_WIDTH(2)) - i_iic_mux_sda ( - .dt({iic_mux_sda_t_s, iic_mux_sda_t_s}), - .di(iic_mux_sda_o_s), - .do(iic_mux_sda_i_s), - .dio(iic_mux_sda)); - - system_wrapper i_system_wrapper ( - .DDR_addr (DDR_addr), - .DDR_ba (DDR_ba), - .DDR_cas_n (DDR_cas_n), - .DDR_ck_n (DDR_ck_n), - .DDR_ck_p (DDR_ck_p), - .DDR_cke (DDR_cke), - .DDR_cs_n (DDR_cs_n), - .DDR_dm (DDR_dm), - .DDR_dq (DDR_dq), - .DDR_dqs_n (DDR_dqs_n), - .DDR_dqs_p (DDR_dqs_p), - .DDR_odt (DDR_odt), - .DDR_ras_n (DDR_ras_n), - .DDR_reset_n (DDR_reset_n), - .DDR_we_n (DDR_we_n), - .FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn), - .FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp), - .FIXED_IO_mio (FIXED_IO_mio), - .FIXED_IO_ps_clk (FIXED_IO_ps_clk), - .FIXED_IO_ps_porb (FIXED_IO_ps_porb), - .FIXED_IO_ps_srstb (FIXED_IO_ps_srstb), - .GPIO_I (gpio_i), - .GPIO_O (gpio_o), - .GPIO_T (gpio_t), - .hdmi_data (hdmi_data), - .hdmi_data_e (hdmi_data_e), - .hdmi_hsync (hdmi_hsync), - .hdmi_out_clk (hdmi_out_clk), - .hdmi_vsync (hdmi_vsync), - .adc_ia_clk_d_o(adc_ia_clk_d_o), - .adc_ia_clk_o(adc_ia_clk_o), - .adc_ia_dat_d_i(adc_ia_dat_d_i), - .adc_ia_dat_i(adc_ia_dat_i), - .adc_ib_clk_d_o(adc_ib_clk_d_o), - .adc_ib_clk_o(adc_ib_clk_o), - .adc_ib_dat_d_i(adc_ib_dat_d_i), - .adc_ib_dat_i(adc_ib_dat_i), - .adc_it_clk_d_o(adc_it_clk_d_o), - .adc_it_clk_o(adc_it_clk_o), - .adc_it_dat_d_i(adc_it_dat_d_i), - .adc_it_dat_i(adc_it_dat_i), - .adc_vbus_clk_o(adc_vbus_clk_o), - .adc_vbus_dat_i(adc_vbus_dat_i), - .fmc_m1_en_o(fmc_m1_en_o), - .fmc_m1_fault_i(fmc_m1_fault_i), - .gpo_o(gpo_o), - .position_i(position_i), - .pwm_ah_o(pwm_ah_o), - .pwm_al_o(pwm_al_o), - .pwm_bh_o(pwm_bh_o), - .pwm_bl_o(pwm_bl_o), - .pwm_ch_o(pwm_ch_o), - .pwm_cl_o(pwm_cl_o), - //.Vaux0_v_n(vauxn0), - //.Vaux0_v_p(vauxp0), - //.vauxn8(vauxn8), - //.vauxp8(vauxp8), - //.Vp_Vn_v_n(vn_in), - //.Vp_Vn_v_p(vp_in), - //.muxaddr_out(muxaddr_out), - .i2s_bclk (i2s_bclk), - .i2s_lrclk (i2s_lrclk), - .i2s_mclk (i2s_mclk), - .i2s_sdata_in (i2s_sdata_in), - .i2s_sdata_out (i2s_sdata_out), - .iic_fmc_scl_io (iic_scl), - .iic_fmc_sda_io (iic_sda), - .iic_mux_scl_I (iic_mux_scl_i_s), - .iic_mux_scl_O (iic_mux_scl_o_s), - .iic_mux_scl_T (iic_mux_scl_t_s), - .iic_mux_sda_I (iic_mux_sda_i_s), - .iic_mux_sda_O (iic_mux_sda_o_s), - .iic_mux_sda_T (iic_mux_sda_t_s), - .ps_intr_0 (ps_intrs[0]), - .ps_intr_1 (ps_intrs[1]), - .ps_intr_10 (ps_intrs[10]), - .ps_intr_11 (ps_intrs[11]), - .ps_intr_12 (ps_intrs[12]), - .ps_intr_13 (ps_intrs[13]), - .ps_intr_2 (ps_intrs[2]), - .ps_intr_3 (ps_intrs[3]), - .ps_intr_4 (ps_intrs[4]), - .ps_intr_5 (ps_intrs[5]), - .ps_intr_6 (ps_intrs[6]), - .ps_intr_7 (ps_intrs[7]), - .ps_intr_8 (ps_intrs[8]), - .ps_intr_9 (ps_intrs[9]), - .iic_fmc_intr(ps_intrs[11]), - .motcon1_c_m_1_irq(ps_intrs[13]), - .motcon1_c_m_2_irq(ps_intrs[9]), - .motcon1_s_d_irq(ps_intrs[12]), - .motcon1_ctrl_irq(ps_intrs[10]), - .otg_vbusoc (otg_vbusoc), - .spdif (spdif)); - -endmodule - -// *************************************************************************** -// ***************************************************************************