daq2/kc705: Fix the ad9144 data offload to use internal bram
parent
907cd613aa
commit
6ad54c1056
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@ -10,8 +10,6 @@ M_DEPS += ../common/daq2_spi.v
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M_DEPS += ../common/daq2_bd.tcl
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../common/xilinx/data_offload_bd.tcl
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M_DEPS += ../../common/xilinx/dacfifo_bd.tcl
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M_DEPS += ../../common/xilinx/adcfifo_bd.tcl
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M_DEPS += ../../common/kc705/kc705_system_mig.prj
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M_DEPS += ../../common/kc705/kc705_system_constr.xdc
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M_DEPS += ../../common/kc705/kc705_system_bd.tcl
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@ -28,8 +26,6 @@ LIB_DEPS += jesd204/axi_jesd204_tx
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LIB_DEPS += jesd204/jesd204_rx
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LIB_DEPS += jesd204/jesd204_tx
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LIB_DEPS += sysid_rom
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LIB_DEPS += util_adcfifo
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LIB_DEPS += util_dacfifo
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LIB_DEPS += util_fifo2axi_bridge
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LIB_DEPS += util_pack/util_cpack2
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LIB_DEPS += util_pack/util_upack2
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@ -1,15 +1,16 @@
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## Offload attributes
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set adc_offload_type 0
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set adc_offload_size [expr 512 * 1024]
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## FIFO depth is 4Mb - 250k samples
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set adc_fifo_address_width 16
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set dac_offload_type 0
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set dac_offload_size [expr 512 * 1024]
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## FIFO depth is 4Mb - 250k samples
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set dac_fifo_address_width 15
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set plddr_offload_axi_data_width 0
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set plddr_offload_axi_addr_width 0
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## NOTE: With this configuration the #36Kb BRAM utilization is at ~80%
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## NOTE: With this configuration the #36Kb BRAM utilization is at ~70%
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source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl
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source $ad_hdl_dir/projects/common/xilinx/adcfifo_bd.tcl
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source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
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source ../common/daq2_bd.tcl
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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@ -18,4 +19,5 @@ ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
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ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt"
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ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
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sysid_gen_sys_init_file
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set sys_cstring "ADC_OFFLOAD_TYPE=$adc_offload_type\nDAC_OFFLOAD_TYPE=$dac_offload_type"
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sysid_gen_sys_init_file $sys_cstring
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