fmcomm2- enable/txnrx- through devif
parent
3953ab5e22
commit
6a9790484f
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@ -17,7 +17,8 @@ create_bd_port -dir O -from 5 -to 0 tx_data_out_n
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create_bd_port -dir O enable
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create_bd_port -dir O txnrx
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create_bd_port -dir O tdd_enabled
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create_bd_port -dir I up_enable
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create_bd_port -dir I up_txnrx
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create_bd_port -dir O tdd_sync_out
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create_bd_port -dir I tdd_sync_in
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@ -86,6 +87,8 @@ ad_connect tx_data_out_p axi_ad9361/tx_data_out_p
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ad_connect tx_data_out_n axi_ad9361/tx_data_out_n
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ad_connect enable axi_ad9361/enable
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ad_connect txnrx axi_ad9361/txnrx
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ad_connect up_enable axi_ad9361/up_enable
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ad_connect up_txnrx axi_ad9361/up_txnrx
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ad_connect axi_ad9361_clk util_ad9361_adc_fifo/din_clk
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ad_connect axi_ad9361/rst util_ad9361_adc_fifo/din_rst
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ad_connect sys_cpu_clk util_ad9361_adc_fifo/dout_clk
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@ -141,7 +144,6 @@ ad_connect util_ad9361_dac_upack/dac_data axi_ad9361_dac_dma/fifo_rd_dout
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ad_connect axi_ad9361_dac_dma/fifo_rd_underflow axi_ad9361/dac_dunf
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ad_connect tdd_sync_out axi_ad9361/tdd_sync_out
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ad_connect tdd_sync_in axi_ad9361/tdd_sync_in
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ad_connect tdd_enabled axi_ad9361/tdd_enabled
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# interconnects
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@ -181,19 +183,18 @@ ad_connect util_ad9361_adc_fifo/dout_valid_0 ila_adc/probe4
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ad_connect sys_cpu_clk ila_adc/clk
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# ila (tdd)
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set ila_tdd [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.1 ila_tdd]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_tdd
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set_property -dict [list CONFIG.C_TRIGIN_EN {false}] $ila_tdd
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set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_tdd
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {4}] $ila_tdd
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {1}] $ila_adc
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set_property -dict [list CONFIG.C_PROBE2_WIDTH {1}] $ila_adc
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set_property -dict [list CONFIG.C_PROBE3_WIDTH {35}] $ila_adc
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {3}] $ila_tdd
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_tdd
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {1}] $ila_tdd
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set_property -dict [list CONFIG.C_PROBE2_WIDTH {41}] $ila_tdd
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ad_connect axi_ad9361_clk ila_tdd/clk
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ad_connect axi_ad9361/enable ila_tdd/probe0
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ad_connect axi_ad9361/txnrx ila_tdd/probe1
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ad_connect axi_ad9361/tdd_enabled ila_tdd/probe2
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ad_connect axi_ad9361/tdd_dbg ila_tdd/probe3
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ad_connect axi_ad9361/tdd_dbg ila_tdd/probe2
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