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axi_i2s/axi_spdif: Create clock and reset interface for DMA bus 

This avoids some critical warnings from Vivado that the DMA bus does not has any associated clocks.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2014-09-29 15:24:14 +02:00
parent 7682400a28
commit 6a08f26905
2 changed files with 7 additions and 0 deletions
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4
library/axi_i2s_adi/axi_i2s_adi_ip.tcl
View File

@ -28,6 +28,8 @@ adi_add_bus "DMA_REQ_RX" "axis" "master" \
{"DMA_REQ_RX_DRREADY" "TREADY"} \
{"DMA_REQ_RX_DRTYPE" "TUSER"} \
{"DMA_REQ_RX_DRLAST" "TLAST"} ]
# Clock and reset are for both DMA_REQ and DMA_ACK
adi_add_bus_clock "DMA_REQ_RX_ACLK" "DMA_REQ_RX:DMA_ACK_RX" "DMA_REQ_RX_RSTN"
adi_add_bus "DMA_ACK_TX" "axis" "slave" \
[list {"DMA_REQ_TX_DAVALID" "TVALID"} \
@ -38,6 +40,8 @@ adi_add_bus "DMA_REQ_TX" "axis" "master" \
{"DMA_REQ_TX_DRREADY" "TREADY"} \
{"DMA_REQ_TX_DRTYPE" "TUSER"} \
{"DMA_REQ_TX_DRLAST" "TLAST"} ]
# Clock and reset are for both DMA_REQ and DMA_ACK
adi_add_bus_clock "DMA_REQ_TX_ACLK" "DMA_REQ_TX:DMA_ACK_TX" "DMA_REQ_TX_RSTN"
adi_set_bus_dependency "S_AXIS" "S_AXIS" \
"(spirit:decode(id('MODELPARAM_VALUE.C_DMA_TYPE')) = 0)"

3
library/axi_spdif_tx/axi_spdif_tx_ip.tcl
View File

@ -31,6 +31,9 @@ adi_add_bus "DMA_REQ" "axis" "master" \
{"DMA_REQ_DRTYPE" "TUSER"} \
{"DMA_REQ_DRLAST" "TLAST"} ]
# Clock and reset are for both DMA_REQ and DMA_ACK
adi_add_bus_clock "DMA_REQ_ACLK" "DMA_REQ:DMA_ACK" "DMA_REQ_RSTN"
adi_set_bus_dependency "S_AXIS" "S_AXIS" \
"(spirit:decode(id('MODELPARAM_VALUE.C_DMA_TYPE')) = 0)"