pzsdr1- ddr board delays update

main
Rejeesh Kutty 2016-04-06 15:30:27 -04:00
parent 7b01cd9eca
commit 68bc647472
1 changed files with 8 additions and 8 deletions

View File

@ -32,12 +32,12 @@ set_property CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF {0}
set_property CONFIG.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL {1} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_TRAIN_READ_GATE {1} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_TRAIN_DATA_EYE {1} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {-0.053} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {-0.059} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {0.065} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {0.066} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.264} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.265} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.330} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.330} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {0.066} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {0.029} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {-0.017} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {-0.038} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.301} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.330} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.314} [get_bd_cells sys_ps7]
set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.333} [get_bd_cells sys_ps7]