kc705: Updated base project with linear flash. Updated all depending projects

main
Adrian Costina 2015-01-13 10:07:51 +02:00
parent 117686f352
commit 623e732ee6
7 changed files with 152 additions and 1 deletions

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@ -78,6 +78,13 @@ module system_top (
mii_tx_en, mii_tx_en,
mii_txd, mii_txd,
linear_flash_addr,
linear_flash_adv_ldn,
linear_flash_ce_n,
linear_flash_dq_io,
linear_flash_oen,
linear_flash_wen,
fan_pwm, fan_pwm,
gpio_lcd, gpio_lcd,
@ -146,6 +153,13 @@ input mii_tx_clk;
output mii_tx_en; output mii_tx_en;
output [ 3:0] mii_txd; output [ 3:0] mii_txd;
output [26:1] linear_flash_addr;
output linear_flash_adv_ldn;
output linear_flash_ce_n;
inout [15:0] linear_flash_dq_io;
output linear_flash_oen;
output linear_flash_wen;
output fan_pwm; output fan_pwm;
inout [ 6:0] gpio_lcd; inout [ 6:0] gpio_lcd;
@ -258,6 +272,12 @@ system_wrapper i_system_wrapper (
.mii_tx_clk (mii_tx_clk), .mii_tx_clk (mii_tx_clk),
.mii_tx_en (mii_tx_en), .mii_tx_en (mii_tx_en),
.mii_txd (mii_txd), .mii_txd (mii_txd),
.linear_flash_addr (linear_flash_addr),
.linear_flash_adv_ldn (linear_flash_adv_ldn),
.linear_flash_ce_n (linear_flash_ce_n),
.linear_flash_dq_io (linear_flash_dq_io),
.linear_flash_oen (linear_flash_oen),
.linear_flash_wen (linear_flash_wen),
.spdif (spdif), .spdif (spdif),
.sys_clk_n (sys_clk_n), .sys_clk_n (sys_clk_n),
.sys_clk_p (sys_clk_p), .sys_clk_p (sys_clk_p),

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@ -79,6 +79,13 @@ module system_top (
mii_tx_en, mii_tx_en,
mii_txd, mii_txd,
linear_flash_addr,
linear_flash_adv_ldn,
linear_flash_ce_n,
linear_flash_dq_io,
linear_flash_oen,
linear_flash_wen,
fan_pwm, fan_pwm,
gpio_lcd, gpio_lcd,
@ -135,6 +142,13 @@ module system_top (
output mii_tx_en; output mii_tx_en;
output [ 3:0] mii_txd; output [ 3:0] mii_txd;
output [26:1] linear_flash_addr;
output linear_flash_adv_ldn;
output linear_flash_ce_n;
inout [15:0] linear_flash_dq_io;
output linear_flash_oen;
output linear_flash_wen;
output fan_pwm; output fan_pwm;
inout [ 6:0] gpio_lcd; inout [ 6:0] gpio_lcd;
@ -221,6 +235,12 @@ module system_top (
.mii_tx_clk (mii_tx_clk), .mii_tx_clk (mii_tx_clk),
.mii_tx_en (mii_tx_en), .mii_tx_en (mii_tx_en),
.mii_txd (mii_txd), .mii_txd (mii_txd),
.linear_flash_addr (linear_flash_addr),
.linear_flash_adv_ldn (linear_flash_adv_ldn),
.linear_flash_ce_n (linear_flash_ce_n),
.linear_flash_dq_io (linear_flash_dq_io),
.linear_flash_oen (linear_flash_oen),
.linear_flash_wen (linear_flash_wen),
.spdif (spdif), .spdif (spdif),
.sys_clk_n (sys_clk_n), .sys_clk_n (sys_clk_n),
.sys_clk_p (sys_clk_p), .sys_clk_p (sys_clk_p),

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@ -30,6 +30,9 @@ set hdmi_vsync [create_bd_port -dir O hdmi_vsync]
set hdmi_data_e [create_bd_port -dir O hdmi_data_e] set hdmi_data_e [create_bd_port -dir O hdmi_data_e]
set hdmi_data [create_bd_port -dir O -from 15 -to 0 hdmi_data] set hdmi_data [create_bd_port -dir O -from 15 -to 0 hdmi_data]
set linear_flash [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:emc_rtl:1.0 linear_flash ]
# spdif audio # spdif audio
set spdif [create_bd_port -dir O spdif] set spdif [create_bd_port -dir O spdif]
@ -88,7 +91,7 @@ set_property -dict [list CONFIG.CONST_VAL {1}] $sys_const_ddr3_1
# instance: axi interconnect (lite) # instance: axi interconnect (lite)
set axi_cpu_aux_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_aux_interconnect] set axi_cpu_aux_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_aux_interconnect]
set_property -dict [list CONFIG.NUM_MI {8}] $axi_cpu_aux_interconnect set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_aux_interconnect
set_property -dict [list CONFIG.STRATEGY {1}] $axi_cpu_aux_interconnect set_property -dict [list CONFIG.STRATEGY {1}] $axi_cpu_aux_interconnect
set axi_cpu_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_interconnect] set axi_cpu_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_interconnect]
@ -162,6 +165,23 @@ set axi_spdif_tx_dma [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_dma:7.1 ax
set_property -dict [list CONFIG.c_include_s2mm {0}] $axi_spdif_tx_dma set_property -dict [list CONFIG.c_include_s2mm {0}] $axi_spdif_tx_dma
set_property -dict [list CONFIG.c_sg_include_stscntrl_strm {0}] $axi_spdif_tx_dma set_property -dict [list CONFIG.c_sg_include_stscntrl_strm {0}] $axi_spdif_tx_dma
# linear flash
set axi_linear_flash [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_emc:3.0 axi_linear_flash]
set_property -dict [list CONFIG.USE_BOARD_FLOW {true} ] $axi_linear_flash
set_property -dict [list CONFIG.EMC_BOARD_INTERFACE {linear_flash}] $axi_linear_flash
set_property -dict [list CONFIG.C_MEM0_TYPE {2}] $axi_linear_flash
set_property -dict [list CONFIG.C_S_AXI_MEM_ID_WIDTH {0}] $axi_linear_flash
set_property -dict [list CONFIG.C_THZCE_PS_MEM_0 {20000}] $axi_linear_flash
set_property -dict [list CONFIG.C_TLZWE_PS_MEM_0 {0}] $axi_linear_flash
set_property -dict [list CONFIG.C_TWC_PS_MEM_0 {19000}] $axi_linear_flash
set_property -dict [list CONFIG.C_WR_REC_TIME_MEM_0 {0}] $axi_linear_flash
set_property -dict [list CONFIG.C_TWP_PS_MEM_0 {50000}] $axi_linear_flash
set_property -dict [list CONFIG.C_TWPH_PS_MEM_0 {20000}] $axi_linear_flash
set_property -dict [list CONFIG.C_TPACC_PS_FLASH_0 {25000}] $axi_linear_flash
set_property -dict [list CONFIG.C_TCEDV_PS_MEM_0 {100000}] $axi_linear_flash
set_property -dict [list CONFIG.C_TAVDV_PS_MEM_0 {100000}] $axi_linear_flash
set_property -dict [list CONFIG.C_THZOE_PS_MEM_0 {15000}] $axi_linear_flash
# connections # connections
connect_bd_net -net mdm_1_debug_sys_rst [get_bd_pins sys_mb_debug/Debug_SYS_Rst] connect_bd_net -net mdm_1_debug_sys_rst [get_bd_pins sys_mb_debug/Debug_SYS_Rst]
@ -249,6 +269,7 @@ connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m04 [get_bd_intf_pins axi
connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m05 [get_bd_intf_pins axi_cpu_aux_interconnect/M05_AXI] [get_bd_intf_pins axi_intc/s_axi] connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m05 [get_bd_intf_pins axi_cpu_aux_interconnect/M05_AXI] [get_bd_intf_pins axi_intc/s_axi]
connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m06 [get_bd_intf_pins axi_cpu_aux_interconnect/M06_AXI] [get_bd_intf_pins axi_gpio_lcd/s_axi] connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m06 [get_bd_intf_pins axi_cpu_aux_interconnect/M06_AXI] [get_bd_intf_pins axi_gpio_lcd/s_axi]
connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m07 [get_bd_intf_pins axi_cpu_aux_interconnect/M07_AXI] [get_bd_intf_pins axi_gpio_sw_led/s_axi] connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m07 [get_bd_intf_pins axi_cpu_aux_interconnect/M07_AXI] [get_bd_intf_pins axi_gpio_sw_led/s_axi]
connect_bd_intf_net -intf_net axi_cpu_aux_interconnect_m08 [get_bd_intf_pins axi_cpu_aux_interconnect/M08_AXI] [get_bd_intf_pins axi_linear_flash/S_AXI_MEM]
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/S00_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/S00_ARESETN] $sys_100m_resetn_source
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M00_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M00_ARESETN] $sys_100m_resetn_source
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M01_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M01_ARESETN] $sys_100m_resetn_source
@ -258,6 +279,7 @@ connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M04_AR
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M05_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M05_ARESETN] $sys_100m_resetn_source
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M06_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M06_ARESETN] $sys_100m_resetn_source
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M07_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M07_ARESETN] $sys_100m_resetn_source
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_aux_interconnect/M08_ARESETN] $sys_100m_resetn_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/S00_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/S00_ACLK] $sys_100m_clk_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M00_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M00_ACLK] $sys_100m_clk_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M01_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M01_ACLK] $sys_100m_clk_source
@ -267,6 +289,7 @@ connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M04_ACLK]
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M05_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M05_ACLK] $sys_100m_clk_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M06_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M06_ACLK] $sys_100m_clk_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M07_ACLK] $sys_100m_clk_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M07_ACLK] $sys_100m_clk_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_aux_interconnect/M08_ACLK] $sys_100m_clk_source
connect_bd_intf_net -intf_net axi_cpu_interconnect_s00 [get_bd_intf_pins axi_cpu_interconnect/S00_AXI] [get_bd_intf_pins sys_mb/M_AXI_DP] connect_bd_intf_net -intf_net axi_cpu_interconnect_s00 [get_bd_intf_pins axi_cpu_interconnect/S00_AXI] [get_bd_intf_pins sys_mb/M_AXI_DP]
connect_bd_intf_net -intf_net axi_cpu_interconnect_m00 [get_bd_intf_pins axi_cpu_interconnect/M00_AXI] [get_bd_intf_pins axi_iic_main/s_axi] connect_bd_intf_net -intf_net axi_cpu_interconnect_m00 [get_bd_intf_pins axi_cpu_interconnect/M00_AXI] [get_bd_intf_pins axi_iic_main/s_axi]
@ -415,6 +438,14 @@ connect_bd_net -net sys_100m_resetn [get_bd_pins sys_audio_clkgen/resetn] $sys_1
connect_bd_net -net sys_audio_clkgen_clk [get_bd_pins sys_audio_clkgen/clk_out1] [get_bd_pins axi_spdif_tx_core/spdif_data_clk] connect_bd_net -net sys_audio_clkgen_clk [get_bd_pins sys_audio_clkgen/clk_out1] [get_bd_pins axi_spdif_tx_core/spdif_data_clk]
connect_bd_net -net spdif_s [get_bd_ports spdif] [get_bd_pins axi_spdif_tx_core/spdif_tx_o] connect_bd_net -net spdif_s [get_bd_ports spdif] [get_bd_pins axi_spdif_tx_core/spdif_tx_o]
# linear_flash
connect_bd_intf_net [get_bd_intf_pins axi_linear_flash/EMC_INTF] [get_bd_intf_ports linear_flash]
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_linear_flash/s_axi_aresetn] $sys_100m_resetn_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_linear_flash/s_axi_aclk] $sys_100m_clk_source
connect_bd_net -net sys_100m_clk [get_bd_pins axi_linear_flash/rdclk] $sys_100m_clk_source
# address map # address map
set sys_zynq 0 set sys_zynq 0

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@ -79,6 +79,13 @@ module system_top (
mii_tx_en, mii_tx_en,
mii_txd, mii_txd,
linear_flash_addr,
linear_flash_adv_ldn,
linear_flash_ce_n,
linear_flash_dq_io,
linear_flash_oen,
linear_flash_wen,
fan_pwm, fan_pwm,
gpio_lcd, gpio_lcd,
@ -173,6 +180,13 @@ module system_top (
output mii_tx_en; output mii_tx_en;
output [ 3:0] mii_txd; output [ 3:0] mii_txd;
output [26:1] linear_flash_addr;
output linear_flash_adv_ldn;
output linear_flash_ce_n;
inout [15:0] linear_flash_dq_io;
output linear_flash_oen;
output linear_flash_wen;
output fan_pwm; output fan_pwm;
inout [ 6:0] gpio_lcd; inout [ 6:0] gpio_lcd;
@ -556,6 +570,12 @@ module system_top (
.mii_tx_clk (mii_tx_clk), .mii_tx_clk (mii_tx_clk),
.mii_tx_en (mii_tx_en), .mii_tx_en (mii_tx_en),
.mii_txd (mii_txd), .mii_txd (mii_txd),
.linear_flash_addr (linear_flash_addr),
.linear_flash_adv_ldn (linear_flash_adv_ldn),
.linear_flash_ce_n (linear_flash_ce_n),
.linear_flash_dq_io (linear_flash_dq_io),
.linear_flash_oen (linear_flash_oen),
.linear_flash_wen (linear_flash_wen),
.rx_data_n (rx_data_n), .rx_data_n (rx_data_n),
.rx_data_p (rx_data_p), .rx_data_p (rx_data_p),
.rx_ref_clk (rx_ref_clk), .rx_ref_clk (rx_ref_clk),

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@ -79,6 +79,13 @@ module system_top (
mii_tx_en, mii_tx_en,
mii_txd, mii_txd,
linear_flash_addr,
linear_flash_adv_ldn,
linear_flash_ce_n,
linear_flash_dq_io,
linear_flash_oen,
linear_flash_wen,
fan_pwm, fan_pwm,
gpio_lcd, gpio_lcd,
@ -146,6 +153,13 @@ module system_top (
output mii_tx_en; output mii_tx_en;
output [ 3:0] mii_txd; output [ 3:0] mii_txd;
output [26:1] linear_flash_addr;
output linear_flash_adv_ldn;
output linear_flash_ce_n;
inout [15:0] linear_flash_dq_io;
output linear_flash_oen;
output linear_flash_wen;
output fan_pwm; output fan_pwm;
inout [ 6:0] gpio_lcd; inout [ 6:0] gpio_lcd;
@ -384,6 +398,12 @@ module system_top (
.mii_tx_clk (mii_tx_clk), .mii_tx_clk (mii_tx_clk),
.mii_tx_en (mii_tx_en), .mii_tx_en (mii_tx_en),
.mii_txd (mii_txd), .mii_txd (mii_txd),
.linear_flash_addr (linear_flash_addr),
.linear_flash_adv_ldn (linear_flash_adv_ldn),
.linear_flash_ce_n (linear_flash_ce_n),
.linear_flash_dq_io (linear_flash_dq_io),
.linear_flash_oen (linear_flash_oen),
.linear_flash_wen (linear_flash_wen),
.spdif (spdif), .spdif (spdif),
.sys_clk_n (sys_clk_n), .sys_clk_n (sys_clk_n),
.sys_clk_p (sys_clk_p), .sys_clk_p (sys_clk_p),

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@ -79,6 +79,13 @@ module system_top (
mii_tx_en, mii_tx_en,
mii_txd, mii_txd,
linear_flash_addr,
linear_flash_adv_ldn,
linear_flash_ce_n,
linear_flash_dq_io,
linear_flash_oen,
linear_flash_wen,
fan_pwm, fan_pwm,
gpio_lcd, gpio_lcd,
@ -154,6 +161,13 @@ module system_top (
output mii_tx_en; output mii_tx_en;
output [ 3:0] mii_txd; output [ 3:0] mii_txd;
output [26:1] linear_flash_addr;
output linear_flash_adv_ldn;
output linear_flash_ce_n;
inout [15:0] linear_flash_dq_io;
output linear_flash_oen;
output linear_flash_wen;
output fan_pwm; output fan_pwm;
inout [ 6:0] gpio_lcd; inout [ 6:0] gpio_lcd;
@ -369,6 +383,12 @@ module system_top (
.mii_tx_clk (mii_tx_clk), .mii_tx_clk (mii_tx_clk),
.mii_tx_en (mii_tx_en), .mii_tx_en (mii_tx_en),
.mii_txd (mii_txd), .mii_txd (mii_txd),
.linear_flash_addr (linear_flash_addr),
.linear_flash_adv_ldn (linear_flash_adv_ldn),
.linear_flash_ce_n (linear_flash_ce_n),
.linear_flash_dq_io (linear_flash_dq_io),
.linear_flash_oen (linear_flash_oen),
.linear_flash_wen (linear_flash_wen),
.spdif (spdif), .spdif (spdif),
.sys_clk_n (sys_clk_n), .sys_clk_n (sys_clk_n),
.sys_clk_p (sys_clk_p), .sys_clk_p (sys_clk_p),

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@ -79,6 +79,13 @@ module system_top (
mii_tx_en, mii_tx_en,
mii_txd, mii_txd,
linear_flash_addr,
linear_flash_adv_ldn,
linear_flash_ce_n,
linear_flash_dq_io,
linear_flash_oen,
linear_flash_wen,
fan_pwm, fan_pwm,
gpio_lcd, gpio_lcd,
@ -163,6 +170,13 @@ module system_top (
output mii_tx_en; output mii_tx_en;
output [ 3:0] mii_txd; output [ 3:0] mii_txd;
output [26:1] linear_flash_addr;
output linear_flash_adv_ldn;
output linear_flash_ce_n;
inout [15:0] linear_flash_dq_io;
output linear_flash_oen;
output linear_flash_wen;
output fan_pwm; output fan_pwm;
inout [ 6:0] gpio_lcd; inout [ 6:0] gpio_lcd;
@ -299,6 +313,12 @@ module system_top (
.mii_tx_clk (mii_tx_clk), .mii_tx_clk (mii_tx_clk),
.mii_tx_en (mii_tx_en), .mii_tx_en (mii_tx_en),
.mii_txd (mii_txd), .mii_txd (mii_txd),
.linear_flash_addr (linear_flash_addr),
.linear_flash_adv_ldn (linear_flash_adv_ldn),
.linear_flash_ce_n (linear_flash_ce_n),
.linear_flash_dq_io (linear_flash_dq_io),
.linear_flash_oen (linear_flash_oen),
.linear_flash_wen (linear_flash_wen),
.spdif (spdif), .spdif (spdif),
.sys_clk_n (sys_clk_n), .sys_clk_n (sys_clk_n),
.sys_clk_p (sys_clk_p), .sys_clk_p (sys_clk_p),