From 61c769e0357e4479b5fffe4ace767b64a7142d9d Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Mon, 27 Oct 2014 09:59:28 -0400 Subject: [PATCH] kc705: daq2 updates --- projects/daq2/kc705/system_bd.tcl | 1 + projects/daq2/kc705/system_constr.xdc | 46 ++--- projects/daq2/kc705/system_project.tcl | 4 + projects/daq2/kc705/system_top.v | 265 ++++++++++++++++++------- 4 files changed, 219 insertions(+), 97 deletions(-) diff --git a/projects/daq2/kc705/system_bd.tcl b/projects/daq2/kc705/system_bd.tcl index 2e2b96ae9..ad00363e9 100644 --- a/projects/daq2/kc705/system_bd.tcl +++ b/projects/daq2/kc705/system_bd.tcl @@ -1,4 +1,5 @@ source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl +source $ad_hdl_dir/projects/common/xilinx/sys_dmafifo.tcl source ../common/daq2_bd.tcl diff --git a/projects/daq2/kc705/system_constr.xdc b/projects/daq2/kc705/system_constr.xdc index 5a810e137..56ffb0499 100644 --- a/projects/daq2/kc705/system_constr.xdc +++ b/projects/daq2/kc705/system_constr.xdc @@ -3,14 +3,14 @@ set_property -dict {PACKAGE_PIN E8} [get_ports rx_ref_clk_p] ; ## B20 FMC_HPC_GBTCLK1_M2C_P set_property -dict {PACKAGE_PIN E7} [get_ports rx_ref_clk_n] ; ## B21 FMC_HPC_GBTCLK1_M2C_N -set_property -dict {PACKAGE_PIN E4} [get_ports rx_data_p[0]] ; ## C06 FMC_HPC_DP0_M2C_P -set_property -dict {PACKAGE_PIN E3} [get_ports rx_data_n[0]] ; ## C07 FMC_HPC_DP0_M2C_N -set_property -dict {PACKAGE_PIN D6} [get_ports rx_data_p[1]] ; ## A02 FMC_HPC_DP1_M2C_P -set_property -dict {PACKAGE_PIN D5} [get_ports rx_data_n[1]] ; ## A03 FMC_HPC_DP1_M2C_N +set_property -dict {PACKAGE_PIN A8} [get_ports rx_data_p[0]] ; ## A10 FMC_HPC_DP3_M2C_P +set_property -dict {PACKAGE_PIN A7} [get_ports rx_data_n[0]] ; ## A11 FMC_HPC_DP3_M2C_N +set_property -dict {PACKAGE_PIN E4} [get_ports rx_data_p[1]] ; ## C06 FMC_HPC_DP0_M2C_P +set_property -dict {PACKAGE_PIN E3} [get_ports rx_data_n[1]] ; ## C07 FMC_HPC_DP0_M2C_N set_property -dict {PACKAGE_PIN B6} [get_ports rx_data_p[2]] ; ## A06 FMC_HPC_DP2_M2C_P set_property -dict {PACKAGE_PIN B5} [get_ports rx_data_n[2]] ; ## A07 FMC_HPC_DP2_M2C_N -set_property -dict {PACKAGE_PIN A8} [get_ports rx_data_p[3]] ; ## A10 FMC_HPC_DP3_M2C_P -set_property -dict {PACKAGE_PIN A7} [get_ports rx_data_n[3]] ; ## A11 FMC_HPC_DP3_M2C_N +set_property -dict {PACKAGE_PIN D6} [get_ports rx_data_p[3]] ; ## A02 FMC_HPC_DP1_M2C_P +set_property -dict {PACKAGE_PIN D5} [get_ports rx_data_n[3]] ; ## A03 FMC_HPC_DP1_M2C_N set_property -dict {PACKAGE_PIN D26 IOSTANDARD LVDS_25} [get_ports rx_sync_p] ; ## D08 FMC_HPC_LA01_CC_P set_property -dict {PACKAGE_PIN C26 IOSTANDARD LVDS_25} [get_ports rx_sync_n] ; ## D09 FMC_HPC_LA01_CC_N set_property -dict {PACKAGE_PIN H26 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_p] ; ## G09 FMC_HPC_LA03_P @@ -18,14 +18,14 @@ set_property -dict {PACKAGE_PIN H27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_po set_property -dict {PACKAGE_PIN C8} [get_ports tx_ref_clk_p] ; ## D04 FMC_HPC_GBTCLK0_M2C_P set_property -dict {PACKAGE_PIN C7} [get_ports tx_ref_clk_n] ; ## D05 FMC_HPC_GBTCLK0_M2C_N -set_property -dict {PACKAGE_PIN D2} [get_ports tx_data_p[0]] ; ## C02 FMC_HPC_DP0_C2M_P -set_property -dict {PACKAGE_PIN D1} [get_ports tx_data_n[0]] ; ## C03 FMC_HPC_DP0_C2M_N -set_property -dict {PACKAGE_PIN C4} [get_ports tx_data_p[1]] ; ## A22 FMC_HPC_DP1_C2M_P -set_property -dict {PACKAGE_PIN C3} [get_ports tx_data_n[1]] ; ## A23 FMC_HPC_DP1_C2M_N -set_property -dict {PACKAGE_PIN B2} [get_ports tx_data_p[2]] ; ## A26 FMC_HPC_DP2_C2M_P -set_property -dict {PACKAGE_PIN B1} [get_ports tx_data_n[2]] ; ## A27 FMC_HPC_DP2_C2M_N -set_property -dict {PACKAGE_PIN A4} [get_ports tx_data_p[3]] ; ## A30 FMC_HPC_DP3_C2M_P -set_property -dict {PACKAGE_PIN A3} [get_ports tx_data_n[3]] ; ## A31 FMC_HPC_DP3_C2M_N +set_property -dict {PACKAGE_PIN A4} [get_ports tx_data_p[0]] ; ## A30 FMC_HPC_DP3_C2M_P (tx_data_p[0]) +set_property -dict {PACKAGE_PIN A3} [get_ports tx_data_n[0]] ; ## A31 FMC_HPC_DP3_C2M_N (tx_data_n[0]) +set_property -dict {PACKAGE_PIN D2} [get_ports tx_data_p[1]] ; ## C02 FMC_HPC_DP0_C2M_P (tx_data_p[3]) +set_property -dict {PACKAGE_PIN D1} [get_ports tx_data_n[1]] ; ## C03 FMC_HPC_DP0_C2M_N (tx_data_n[3]) +set_property -dict {PACKAGE_PIN B2} [get_ports tx_data_p[2]] ; ## A26 FMC_HPC_DP2_C2M_P (tx_data_p[1]) +set_property -dict {PACKAGE_PIN B1} [get_ports tx_data_n[2]] ; ## A27 FMC_HPC_DP2_C2M_N (tx_data_n[1]) +set_property -dict {PACKAGE_PIN C4} [get_ports tx_data_p[3]] ; ## A22 FMC_HPC_DP1_C2M_P (tx_data_p[2]) +set_property -dict {PACKAGE_PIN C3} [get_ports tx_data_n[3]] ; ## A23 FMC_HPC_DP1_C2M_N (tx_data_n[2]) set_property -dict {PACKAGE_PIN H24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_p] ; ## H07 FMC_HPC_LA02_P set_property -dict {PACKAGE_PIN H25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_n] ; ## H08 FMC_HPC_LA02_N set_property -dict {PACKAGE_PIN G28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sysref_p] ; ## H10 FMC_HPC_LA04_P @@ -36,20 +36,22 @@ set_property -dict {PACKAGE_PIN D29 IOSTANDARD LVCMOS25} [get_ports spi_csn_da set_property -dict {PACKAGE_PIN A30 IOSTANDARD LVCMOS25} [get_ports spi_csn_adc] ; ## D15 FMC_HPC_LA09_N set_property -dict {PACKAGE_PIN F30 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D12 FMC_HPC_LA05_N set_property -dict {PACKAGE_PIN B30 IOSTANDARD LVCMOS25} [get_ports spi_sdio] ; ## D14 FMC_HPC_LA09_P +set_property -dict {PACKAGE_PIN E30 IOSTANDARD LVCMOS25} [get_ports spi_dir] ; ## G13 FMC_HPC_LA08_N -set_property -dict {PACKAGE_PIN G30 IOSTANDARD LVCMOS25} [get_ports clkd_reset] ; ## C11 FMC_HPC_LA06_N set_property -dict {PACKAGE_PIN E29 IOSTANDARD LVCMOS25} [get_ports clkd_sync] ; ## G12 FMC_HPC_LA08_P -set_property -dict {PACKAGE_PIN E30 IOSTANDARD LVCMOS25} [get_ports clkd_pd] ; ## G13 FMC_HPC_LA08_N set_property -dict {PACKAGE_PIN C30 IOSTANDARD LVCMOS25} [get_ports dac_reset] ; ## C15 FMC_HPC_LA10_N set_property -dict {PACKAGE_PIN B29 IOSTANDARD LVCMOS25} [get_ports dac_txen] ; ## G16 FMC_HPC_LA12_N set_property -dict {PACKAGE_PIN H30 IOSTANDARD LVCMOS25} [get_ports adc_pd] ; ## C10 FMC_HPC_LA06_P -set_property -dict {PACKAGE_PIN C25 IOSTANDARD LVCMOS25} [get_ports clkd_status[0]] ; ## G06 FMC_HPC_LA00_CC_P -set_property -dict {PACKAGE_PIN B25 IOSTANDARD LVCMOS25} [get_ports clkd_status[1]] ; ## G07 FMC_HPC_LA00_CC_N +set_property -dict {PACKAGE_PIN A25 IOSTANDARD LVCMOS25} [get_ports clkd_status[0]] ; ## D17 FMC_HPC_LA13_P +set_property -dict {PACKAGE_PIN A26 IOSTANDARD LVCMOS25} [get_ports clkd_status[1]] ; ## D18 FMC_HPC_LA13_N set_property -dict {PACKAGE_PIN C29 IOSTANDARD LVCMOS25} [get_ports dac_irq] ; ## G15 FMC_HPC_LA12_P set_property -dict {PACKAGE_PIN G27 IOSTANDARD LVCMOS25} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P set_property -dict {PACKAGE_PIN F27 IOSTANDARD LVCMOS25} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N +set_property -dict {PACKAGE_PIN E28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P +set_property -dict {PACKAGE_PIN D28 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N + # clocks create_clock -name tx_ref_clk -period 2.00 [get_ports tx_ref_clk_p] @@ -57,12 +59,4 @@ create_clock -name rx_ref_clk -period 2.00 [get_ports rx_ref_clk_p] create_clock -name tx_div_clk -period 4.00 [get_nets i_system_wrapper/system_i/axi_daq2_gt_tx_clk] create_clock -name rx_div_clk -period 4.00 [get_nets i_system_wrapper/system_i/axi_daq2_gt_rx_clk] -set_clock_groups -asynchronous -group {tx_div_clk} -set_clock_groups -asynchronous -group {rx_div_clk} -set_false_path -through [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/i_up_gt/i_drp_rst_reg/i_rst_reg/PRE] -set_false_path -through [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/i_up_gt/i_gt_pll_rst_reg/i_rst_reg/PRE] -set_false_path -through [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/i_up_gt/i_gt_rx_rst_reg/i_rst_reg/PRE] -set_false_path -through [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/i_up_gt/i_gt_tx_rst_reg/i_rst_reg/PRE] -set_false_path -through [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/i_up_gt/i_rx_rst_reg/i_rst_reg/PRE] -set_false_path -through [get_pins i_system_wrapper/system_i/axi_daq2_gt/inst/i_up_gt/i_tx_rst_reg/i_rst_reg/PRE] diff --git a/projects/daq2/kc705/system_project.tcl b/projects/daq2/kc705/system_project.tcl index f296237f7..0a7a2d624 100644 --- a/projects/daq2/kc705/system_project.tcl +++ b/projects/daq2/kc705/system_project.tcl @@ -9,8 +9,12 @@ adi_project_files daq2_kc705 [list \ "../common/daq2_spi.v" \ "system_top.v" \ "system_constr.xdc"\ + "$ad_hdl_dir/library/common/ad_iobuf.v" \ "$ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc" ] +set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc] +set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc] + adi_project_run daq2_kc705 diff --git a/projects/daq2/kc705/system_top.v b/projects/daq2/kc705/system_top.v index 18ade969c..7fbf014a8 100644 --- a/projects/daq2/kc705/system_top.v +++ b/projects/daq2/kc705/system_top.v @@ -115,6 +115,9 @@ module system_top ( tx_data_p, tx_data_n, + trig_p, + trig_n, + adc_fdb, adc_fda, dac_irq, @@ -123,15 +126,14 @@ module system_top ( adc_pd, dac_txen, dac_reset, - clkd_pd, clkd_sync, - clkd_reset, spi_csn_clk, spi_csn_dac, spi_csn_adc, spi_clk, - spi_sdio); + spi_sdio, + spi_dir); input sys_rst; input sys_clk_p; @@ -207,6 +209,9 @@ module system_top ( output [ 3:0] tx_data_p; output [ 3:0] tx_data_n; + input trig_p; + input trig_n; + inout adc_fdb; inout adc_fda; inout dac_irq; @@ -215,18 +220,29 @@ module system_top ( inout adc_pd; inout dac_txen; inout dac_reset; - inout clkd_pd; inout clkd_sync; - inout clkd_reset; output spi_csn_clk; output spi_csn_dac; output spi_csn_adc; output spi_clk; inout spi_sdio; + output spi_dir; + // internal registers + + reg dac_drd = 'd0; + reg [63:0] dac_ddata_0 = 'd0; + reg [63:0] dac_ddata_1 = 'd0; + reg [63:0] dac_ddata_2 = 'd0; + reg [63:0] dac_ddata_3 = 'd0; + reg adc_dsync = 'd0; + reg adc_dwr = 'd0; + reg [127:0] adc_ddata = 'd0; + // internal signals + wire trig; wire rx_ref_clk; wire rx_sysref; wire rx_sync; @@ -236,6 +252,23 @@ module system_top ( wire [ 2:0] spi_csn; wire spi_mosi; wire spi_miso; + wire dac_clk; + wire [127:0] dac_ddata; + wire dac_enable_0; + wire dac_enable_1; + wire dac_enable_2; + wire dac_enable_3; + wire dac_valid_0; + wire dac_valid_1; + wire dac_valid_2; + wire dac_valid_3; + wire adc_clk; + wire [63:0] adc_data_0; + wire [63:0] adc_data_1; + wire adc_enable_0; + wire adc_enable_1; + wire adc_valid_0; + wire adc_valid_1; wire [ 5:0] gpio_ctl_i; wire [ 5:0] gpio_ctl_o; wire [ 5:0] gpio_ctl_t; @@ -243,12 +276,123 @@ module system_top ( wire [ 4:0] gpio_status_o; wire [ 4:0] gpio_status_t; - // assignments + // adc-dac data + + always @(posedge dac_clk) begin + case ({dac_enable_1, dac_enable_0}) + 2'b11: begin + dac_drd <= dac_valid_0 & dac_valid_1; + dac_ddata_0[63:48] <= dac_ddata[111: 96]; + dac_ddata_0[47:32] <= dac_ddata[ 79: 64]; + dac_ddata_0[31:16] <= dac_ddata[ 47: 32]; + dac_ddata_0[15: 0] <= dac_ddata[ 15: 0]; + dac_ddata_1[63:48] <= dac_ddata[127:112]; + dac_ddata_1[47:32] <= dac_ddata[ 95: 80]; + dac_ddata_1[31:16] <= dac_ddata[ 63: 48]; + dac_ddata_1[15: 0] <= dac_ddata[ 31: 16]; + dac_ddata_2 <= 64'd0; + dac_ddata_3 <= 64'd0; + end + 2'b10: begin + dac_drd <= dac_valid_1 & ~dac_drd; + dac_ddata_0 <= 64'd0; + if (dac_drd == 1'b1) begin + dac_ddata_1[63:48] <= dac_ddata[127:112]; + dac_ddata_1[47:32] <= dac_ddata[111: 96]; + dac_ddata_1[31:16] <= dac_ddata[ 95: 80]; + dac_ddata_1[15: 0] <= dac_ddata[ 79: 64]; + end else begin + dac_ddata_1[63:48] <= dac_ddata[ 63: 48]; + dac_ddata_1[47:32] <= dac_ddata[ 47: 32]; + dac_ddata_1[31:16] <= dac_ddata[ 31: 16]; + dac_ddata_1[15: 0] <= dac_ddata[ 15: 0]; + end + dac_ddata_2 <= 64'd0; + dac_ddata_3 <= 64'd0; + end + 2'b01: begin + dac_drd <= dac_valid_0 & ~dac_drd; + if (dac_drd == 1'b1) begin + dac_ddata_0[63:48] <= dac_ddata[127:112]; + dac_ddata_0[47:32] <= dac_ddata[111: 96]; + dac_ddata_0[31:16] <= dac_ddata[ 95: 80]; + dac_ddata_0[15: 0] <= dac_ddata[ 79: 64]; + end else begin + dac_ddata_0[63:48] <= dac_ddata[ 63: 48]; + dac_ddata_0[47:32] <= dac_ddata[ 47: 32]; + dac_ddata_0[31:16] <= dac_ddata[ 31: 16]; + dac_ddata_0[15: 0] <= dac_ddata[ 15: 0]; + end + dac_ddata_1 <= 64'd0; + dac_ddata_2 <= 64'd0; + dac_ddata_3 <= 64'd0; + end + default: begin + dac_drd <= 1'b0; + dac_ddata_0 <= 64'd0; + dac_ddata_1 <= 64'd0; + dac_ddata_2 <= 64'd0; + dac_ddata_3 <= 64'd0; + end + endcase + end + + always @(posedge adc_clk) begin + case ({adc_enable_1, adc_enable_0}) + 2'b11: begin + adc_dsync <= 1'b1; + adc_dwr <= adc_valid_1 & adc_valid_0; + adc_ddata[127:112] <= adc_data_1[63:48]; + adc_ddata[111: 96] <= adc_data_0[63:48]; + adc_ddata[ 95: 80] <= adc_data_1[47:32]; + adc_ddata[ 79: 64] <= adc_data_0[47:32]; + adc_ddata[ 63: 48] <= adc_data_1[31:16]; + adc_ddata[ 47: 32] <= adc_data_0[31:16]; + adc_ddata[ 31: 16] <= adc_data_1[15: 0]; + adc_ddata[ 15: 0] <= adc_data_0[15: 0]; + end + 2'b10: begin + adc_dsync <= 1'b1; + adc_dwr <= adc_valid_1 & ~adc_dwr; + adc_ddata[127:112] <= adc_data_1[63:48]; + adc_ddata[111: 96] <= adc_data_1[47:32]; + adc_ddata[ 95: 80] <= adc_data_1[31:16]; + adc_ddata[ 79: 64] <= adc_data_1[15: 0]; + adc_ddata[ 63: 48] <= adc_ddata[127:112]; + adc_ddata[ 47: 32] <= adc_ddata[111: 96]; + adc_ddata[ 31: 16] <= adc_ddata[ 95: 80]; + adc_ddata[ 15: 0] <= adc_ddata[ 79: 64]; + end + 2'b01: begin + adc_dsync <= 1'b1; + adc_dwr <= adc_valid_0 & ~adc_dwr; + adc_ddata[127:112] <= adc_data_0[63:48]; + adc_ddata[111: 96] <= adc_data_0[47:32]; + adc_ddata[ 95: 80] <= adc_data_0[31:16]; + adc_ddata[ 79: 64] <= adc_data_0[15: 0]; + adc_ddata[ 63: 48] <= adc_ddata[127:112]; + adc_ddata[ 47: 32] <= adc_ddata[111: 96]; + adc_ddata[ 31: 16] <= adc_ddata[ 95: 80]; + adc_ddata[ 15: 0] <= adc_ddata[ 79: 64]; + end + default: begin + adc_dsync <= 1'b0; + adc_dwr <= 1'b0; + adc_ddata <= 128'd0; + end + endcase + end + + // spi assign spi_csn_adc = spi_csn[2]; assign spi_csn_dac = spi_csn[1]; assign spi_csn_clk = spi_csn[0]; + // default logic + + assign fan_pwm = 1'b1; + // instantiations IBUFDS_GTE2 i_ibufds_rx_ref_clk ( @@ -290,75 +434,40 @@ module system_top ( .spi_clk (spi_clk), .spi_mosi (spi_mosi), .spi_miso (spi_miso), - .spi_sdio (spi_sdio)); + .spi_sdio (spi_sdio), + .spi_dir (spi_dir)); - IOBUF i_iobuf_gpio_adc_pd ( - .I (gpio_ctl_o[5]), - .O (gpio_ctl_i[5]), - .T (gpio_ctl_t[5]), - .IO (adc_pd)); + IBUFDS i_ibufds_trig ( + .I (trig_p), + .IB (trig_n), + .O (trig)); - IOBUF i_iobuf_gpio_dac_txen ( - .I (gpio_ctl_o[4]), - .O (gpio_ctl_i[4]), - .T (gpio_ctl_t[4]), - .IO (dac_txen)); + assign gpio_ctl_i[0] = trig; - IOBUF i_iobuf_gpio_dac_reset ( - .I (gpio_ctl_o[3]), - .O (gpio_ctl_i[3]), - .T (gpio_ctl_t[3]), - .IO (dac_reset)); - - IOBUF i_iobuf_gpio_clkd_pd ( - .I (gpio_ctl_o[2]), - .O (gpio_ctl_i[2]), - .T (gpio_ctl_t[2]), - .IO (clkd_pd)); - - IOBUF i_iobuf_gpio_clkd_sync ( - .I (gpio_ctl_o[1]), - .O (gpio_ctl_i[1]), - .T (gpio_ctl_t[1]), - .IO (clkd_sync)); - - IOBUF i_iobuf_gpio_clkd_reset ( - .I (gpio_ctl_o[0]), - .O (gpio_ctl_i[0]), - .T (gpio_ctl_t[0]), - .IO (clkd_reset)); - - IOBUF i_iobuf_gpio_adc_fdb ( - .I (gpio_status_o[4]), - .O (gpio_status_i[4]), - .T (gpio_status_t[4]), - .IO (adc_fdb)); - - IOBUF i_iobuf_gpio_adc_fda ( - .I (gpio_status_o[3]), - .O (gpio_status_i[3]), - .T (gpio_status_t[3]), - .IO (adc_fda)); - - IOBUF i_iobuf_gpio_dac_irq ( - .I (gpio_status_o[2]), - .O (gpio_status_i[2]), - .T (gpio_status_t[2]), - .IO (dac_irq)); - - IOBUF i_iobuf_gpio_clkd_status_1 ( - .I (gpio_status_o[1]), - .O (gpio_status_i[1]), - .T (gpio_status_t[1]), - .IO (clkd_status[1])); - - IOBUF i_iobuf_gpio_clkd_status_0 ( - .I (gpio_status_o[0]), - .O (gpio_status_i[0]), - .T (gpio_status_t[0]), - .IO (clkd_status[0])); + ad_iobuf #(.DATA_WIDTH(9)) i_iobuf ( + .dt ({gpio_ctl_t[5:3], gpio_ctl_t[1], gpio_status_t[4:0]}), + .di ({gpio_ctl_o[5:3], gpio_ctl_o[1], gpio_status_o[4:0]}), + .do ({gpio_ctl_i[5:3], gpio_ctl_i[1], gpio_status_i[4:0]}), + .dio ({ adc_pd, // 10 + dac_txen, // 9 + dac_reset, // 8 + clkd_sync, // 6 + adc_fdb, // 4 + adc_fda, // 3 + dac_irq, // 2 + clkd_status})); // 0 system_wrapper i_system_wrapper ( + .adc_clk (adc_clk), + .adc_data_0 (adc_data_0), + .adc_data_1 (adc_data_1), + .adc_ddata (adc_ddata), + .adc_dsync (adc_dsync), + .adc_dwr (adc_dwr), + .adc_enable_0 (adc_enable_0), + .adc_enable_1 (adc_enable_1), + .adc_valid_0 (adc_valid_0), + .adc_valid_1 (adc_valid_1), .ddr3_1_n (ddr3_1_n), .ddr3_1_p (ddr3_1_p), .ddr3_addr (ddr3_addr), @@ -376,7 +485,21 @@ module system_top ( .ddr3_ras_n (ddr3_ras_n), .ddr3_reset_n (ddr3_reset_n), .ddr3_we_n (ddr3_we_n), - .fan_pwm (fan_pwm), + .dac_clk (dac_clk), + .dac_ddata (dac_ddata), + .dac_ddata_0 (dac_ddata_0), + .dac_ddata_1 (dac_ddata_1), + .dac_ddata_2 (dac_ddata_2), + .dac_ddata_3 (dac_ddata_3), + .dac_drd (dac_drd), + .dac_enable_0 (dac_enable_0), + .dac_enable_1 (dac_enable_1), + .dac_enable_2 (dac_enable_2), + .dac_enable_3 (dac_enable_3), + .dac_valid_0 (dac_valid_0), + .dac_valid_1 (dac_valid_1), + .dac_valid_2 (dac_valid_2), + .dac_valid_3 (dac_valid_3), .gpio_ctl_i (gpio_ctl_i), .gpio_ctl_o (gpio_ctl_o), .gpio_ctl_t (gpio_ctl_t),