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axi_dmac: Use sane defaults for the AXI protocol type 

The axi_dmac core generates requests which are both AXI3 and AXI4
compliant. This means it is possible to connect it to both a AXI3 or AXI4
slave port without needing a AXI protocol converter.  Unfortunately it is
not possible to declare a port as both AXI3 and AXI4 compliant, so the core
has the C_DMA_AXI_PROTCOL_SRC and C_DMA_AXI_PROTOCOL_DEST parameters, which
allow to configure the protocol type of the corresponding AXI master
interface. Currently the default is always AXI4.

But when being used on ZYNQ it is most likely that the AXI master interface
of the DMAC core ends up being connected to the AXI3, so change the default
to AXI3 if the core is instantiated in a ZYNQ design.

The default can still be overwritten by explicitly setting the
configuration property.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2015-09-18 12:46:36 +02:00
parent f079b2193a
commit 5f307f862f
1 changed files with 15 additions and 2 deletions
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17
library/axi_dmac/bd/bd.tcl
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@ -1,8 +1,21 @@
proc init {cellpath otherInfo} {
bd::mark_propagate_override \
[get_bd_cells $cellpath] \
set ip [get_bd_cells $cellpath]
bd::mark_propagate_override $ip \
"ASYNC_CLK_REQ_SRC ASYNC_CLK_SRC_DEST ASYNC_CLK_DEST_REQ"
# On ZYNQ the core is most likely connected to the AXI3 HP ports so use AXI3
# as the default.
set family [string tolower [get_property FAMILY [get_property PART [current_project]]]]
if {$family == "zynq"} {
set axi_protocol 1
} else {
set axi_protocol 0
}
set_property "CONFIG.DMA_AXI_PROTOCOL_SRC" $axi_protocol $ip
set_property "CONFIG.DMA_AXI_PROTOCOL_DEST" $axi_protocol $ip
}
proc axi_dmac_detect_async_clk { cellpath ip param_name clk_a clk_b } {