From 5d803d6b6eb1e426d2f847b82ecdbff99477634d Mon Sep 17 00:00:00 2001 From: Laszlo Nagy Date: Tue, 25 Aug 2020 14:38:57 +0100 Subject: [PATCH] library/common/ad_dds: Fix initialization when 'valid' not constant If dac_valid is not a constant '1' it gets synchronized with the dac_data_sync signal. This causes that dac_valid never asserts while dac_data_sync is high, this way skipping the phase initialization. --- library/common/ad_dds.v | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/library/common/ad_dds.v b/library/common/ad_dds.v index 3d2ab591d..df209c6b5 100644 --- a/library/common/ad_dds.v +++ b/library/common/ad_dds.v @@ -118,7 +118,6 @@ module ad_dds #( // phase accumulator for (i=1; i <= CLK_RATIO; i=i+1) begin: dds_phase always @(posedge clk) begin - if (dac_valid == 1'b1) begin if (dac_data_sync == 1'b1) begin dac_dds_phase_0[i] <= 'd0; dac_dds_phase_1[i] <= 'd0; @@ -130,11 +129,10 @@ module ad_dds #( dac_dds_phase_0[i] <= dac_dds_phase_0[i-1] + tone_1_freq_word; dac_dds_phase_1[i] <= dac_dds_phase_1[i-1] + tone_2_freq_word; end - end else begin + end else if (dac_valid == 1'b1) begin dac_dds_phase_0[i] <= dac_dds_phase_0[i] + dac_dds_incr_0; dac_dds_phase_1[i] <= dac_dds_phase_1[i] + dac_dds_incr_1; end - end end // phase to amplitude convertor