ad_ip_jesd204_tpl_adc: Add external synchronization

The external synchronization signal should be synchronous with the
adc clock. Synchronization will be done on the rising edge of the signal.
The control bit is self clearing. Status bit shows that the synchronization
is armed but the synchronization signal has not yet been received. While
the synchronization mechanism is armed, the adc_rst output signal is set

The current format should allow for the SYSREF signal to be used as
synchronous capture start, but will need to be disabled before the
synchronization mechanism is armed

library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc.v

@@ -54,6 +54,9 @@ module ad_ip_jesd204_tpl_adc #(
   output [NUM_LANES*8*OCTETS_PER_BEAT-1:0] adc_data,
   input adc_dovf,
 
+  input adc_sync_in,
+  output adc_rst,
+
   // axi interface
 
   input s_axi_aclk,
@@ -99,6 +102,13 @@ module ad_ip_jesd204_tpl_adc #(
   wire [NUM_CHANNELS-1:0] pn_err_s;
   wire [NUM_CHANNELS-1:0] pn_oos_s;
 
+  wire adc_rst_sync_s;
+  wire adc_rst_s;
+  wire adc_sync;
+  wire adc_sync_status;
+
+  assign adc_rst = adc_rst_s | adc_rst_sync_s;
+
   // regmap
   ad_ip_jesd204_tpl_adc_regmap #(
     .ID (ID),
@@ -144,6 +154,11 @@ module ad_ip_jesd204_tpl_adc #(
 
     .enable (enable),
 
+    .adc_sync (adc_sync),
+    .adc_sync_status (adc_sync_status),
+
+    .adc_rst (adc_rst_s),
+
     .adc_dovf (adc_dovf),
 
     .jesd_m (NUM_CHANNELS),
@@ -182,6 +197,11 @@ module ad_ip_jesd204_tpl_adc #(
     .link_sof (link_sof),
     .link_data (link_data),
 
+    .adc_sync (adc_sync),
+    .adc_sync_status (adc_sync_status),
+    .adc_sync_in (adc_sync_in),
+    .adc_rst_sync (adc_rst_sync_s),
+
     .adc_valid (adc_valid),
     .adc_data (adc_data)
   );

library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc_core.v

@@ -48,6 +48,11 @@ module ad_ip_jesd204_tpl_adc_core #(
   output [NUM_CHANNELS-1:0] adc_valid,
   output [DMA_DATA_WIDTH-1:0] adc_data,
 
+  input adc_sync,
+  output adc_sync_status,
+  input adc_sync_in,
+  output adc_rst_sync,
+
   input link_valid,
   output link_ready,
   input [OCTETS_PER_BEAT-1:0] link_sof,
@@ -60,8 +65,26 @@ module ad_ip_jesd204_tpl_adc_core #(
 
   wire [ADC_DATA_WIDTH-1:0] raw_data_s;
 
+  reg adc_sync_armed = 1'b0;
+  reg adc_sync_in_d1 = 1'b0;
+  reg adc_sync_d1 = 1'b0;
+
   assign link_ready = 1'b1;
-  assign adc_valid = {NUM_CHANNELS{1'b1}};
+  assign adc_valid = {NUM_CHANNELS{link_valid}};
+  assign adc_sync_status = adc_sync_armed;
+  assign adc_rst_sync = adc_sync_armed;
+
+  always @(posedge clk) begin
+    adc_sync_in_d1 <= adc_sync_in;
+    adc_sync_d1 <= adc_sync;
+    if ((~adc_sync_d1 & adc_sync) == 1'b1) begin
+      adc_sync_armed <= ~adc_sync_armed;
+    end else if ((~adc_sync_in_d1 & adc_sync_in) == 1'b1) begin
+      adc_sync_armed <= 1'b0;
+    end
+  end
+
+  // synchronization logic
 
   ad_ip_jesd204_tpl_adc_deframer #(
     .NUM_LANES (NUM_LANES),

library/jesd204/ad_ip_jesd204_tpl_adc/ad_ip_jesd204_tpl_adc_regmap.v

@@ -71,6 +71,10 @@ module ad_ip_jesd204_tpl_adc_regmap #(
 
   output [NUM_CHANNELS-1:0] enable,
 
+  input adc_sync_status,
+  output adc_sync,
+  output adc_rst,
+
   // Underflow
   input adc_dovf,
 
@@ -101,8 +105,6 @@ module ad_ip_jesd204_tpl_adc_regmap #(
   wire up_clk;
   wire up_rstn;
 
-  wire adc_rst;
-
   wire up_wreq_s;
   wire [9:0] up_waddr_s;
   wire [31:0] up_wdata_s;
@@ -139,7 +141,7 @@ module ad_ip_jesd204_tpl_adc_regmap #(
     .up_rstn (up_rstn),
 
     .up_axi_awvalid (s_axi_awvalid),
-    .up_axi_awaddr (s_axi_awaddr),
+    .up_axi_awaddr ({4'b0,s_axi_awaddr}),
     .up_axi_awready (s_axi_awready),
     .up_axi_wvalid (s_axi_wvalid),
     .up_axi_wdata (s_axi_wdata),
@@ -149,7 +151,7 @@ module ad_ip_jesd204_tpl_adc_regmap #(
     .up_axi_bresp (s_axi_bresp),
     .up_axi_bready (s_axi_bready),
     .up_axi_arvalid (s_axi_arvalid),
-    .up_axi_araddr (s_axi_araddr),
+    .up_axi_araddr ({4'b0,s_axi_araddr}),
     .up_axi_arready (s_axi_arready),
     .up_axi_rvalid (s_axi_rvalid),
     .up_axi_rresp (s_axi_rresp),
@@ -213,12 +215,12 @@ module ad_ip_jesd204_tpl_adc_regmap #(
     .adc_ddr_edgesel (),
     .adc_pin_mode (),
     .adc_status (adc_status),
-    .adc_sync_status (1'd0),
+    .adc_sync_status (adc_sync_status),
     .adc_status_ovf (adc_dovf),
     .adc_clk_ratio (CLK_RATIO),
     .adc_start_code (),
     .adc_sref_sync (),
-    .adc_sync (),
+    .adc_sync (adc_sync),
 
     .up_status_pn_err (up_status_pn_err),
     .up_status_pn_oos (up_status_pn_oos),