axi_dmac: Fix width for dest response FIFO
The width of the dest response FIFO is 1 bit not 3 bits. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
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cfd57fc462
commit
5c22e622de
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@ -1011,7 +1011,7 @@ util_axis_fifo #(
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);
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util_axis_fifo #(
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.DATA_WIDTH(3),
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.DATA_WIDTH(1),
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.ADDRESS_WIDTH(0),
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.ASYNC_CLK(ASYNC_CLK_DEST_REQ)
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) i_dest_response_fifo (
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