axi_mc_controller:axi_mc_current_monitor: define generated clocks in IP constraints file for better OOC integration

main
Laszlo Nagy 2019-04-15 12:31:55 +01:00 committed by Laszlo Nagy
parent 01748d4364
commit 5b13e205b9
7 changed files with 14 additions and 29 deletions

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@ -11,6 +11,7 @@ GENERIC_DEPS += control_registers.v
GENERIC_DEPS += delay.v
GENERIC_DEPS += motor_driver.v
XILINX_DEPS += axi_mc_controller_constr.xdc
XILINX_DEPS += axi_mc_controller_ip.tcl
include ../scripts/library.mk

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@ -0,0 +1,3 @@
create_generated_clock -name [current_instance]/pwm_ctrl -source [get_ports ref_clk] \
-divide_by 2 [get_pins pwm_gen_clk_reg/Q]

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@ -9,6 +9,7 @@ adi_ip_files axi_mc_controller [list \
"motor_driver.v" \
"delay.v" \
"control_registers.v" \
"axi_mc_controller_constr.xdc" \
"axi_mc_controller.v" ]
adi_ip_properties axi_mc_controller

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@ -16,6 +16,7 @@ GENERIC_DEPS += ad7401.v
GENERIC_DEPS += axi_mc_current_monitor.v
GENERIC_DEPS += dec256sinc24b.v
XILINX_DEPS += axi_mc_current_monitor_constr.xdc
XILINX_DEPS += axi_mc_current_monitor_ip.tcl
include ../scripts/library.mk

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@ -0,0 +1,7 @@
create_generated_clock -name [current_instance]/ia_clk -source [get_ports adc_clk_i] \
-divide_by 256 [get_pins ia_if/filter/word_count_reg[7]/Q]
create_generated_clock -name [current_instance]/ib_clk -source [get_ports adc_clk_i] \
-divide_by 256 [get_pins ib_if/filter/word_count_reg[7]/Q]
create_generated_clock -name [current_instance]/vbus_clk -source [get_ports adc_clk_i] \
-divide_by 256 [get_pins vbus_if/filter/word_count_reg[7]/Q]

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@ -14,6 +14,7 @@ adi_ip_files axi_mc_current_monitor [list \
"$ad_hdl_dir/library/common/up_adc_channel.v" \
"dec256sinc24b.v" \
"ad7401.v" \
"axi_mc_current_monitor_constr.xdc" \
"axi_mc_current_monitor.v" ]
adi_ip_properties axi_mc_current_monitor

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@ -109,35 +109,6 @@ create_clock -period 8.000 -name rgmii_rxc2 [get_ports eth2_rgmii_rxc]
create_clock -name mdio_mdc -period 400 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/EMIOENET0MDIOMDC]
create_generated_clock -name pwm_ctrl_1 -source [get_pins i_system_wrapper/system_i/controller_m1/inst/ref_clk] \
-divide_by 2 [get_pins i_system_wrapper/system_i/controller_m1/inst/pwm_gen_clk_reg/Q]
create_generated_clock -name pwm_ctrl_2 -source [get_pins i_system_wrapper/system_i/controller_m2/inst/ref_clk] \
-divide_by 2 [get_pins i_system_wrapper/system_i/controller_m2/inst/pwm_gen_clk_reg/Q]
create_generated_clock -name cm1_ia -source [get_pins i_system_wrapper/system_i/current_monitor_m1/inst/adc_clk_i] \
-divide_by 256 [get_pins i_system_wrapper/system_i/current_monitor_m1/inst/ia_if/filter/word_count_reg[7]/Q]
create_generated_clock -name cm1_ib -source [get_pins i_system_wrapper/system_i/current_monitor_m1/inst/adc_clk_i] \
-divide_by 256 [get_pins i_system_wrapper/system_i/current_monitor_m1/inst/ib_if/filter/word_count_reg[7]/Q]
create_generated_clock -name cm1_vbus -source [get_pins i_system_wrapper/system_i/current_monitor_m1/inst/adc_clk_i] \
-divide_by 256 [get_pins i_system_wrapper/system_i/current_monitor_m1/inst/vbus_if/filter/word_count_reg[7]/Q]
create_generated_clock -name cm2_ia -source [get_pins i_system_wrapper/system_i/current_monitor_m2/inst/adc_clk_i] \
-divide_by 256 [get_pins i_system_wrapper/system_i/current_monitor_m2/inst/ia_if/filter/word_count_reg[7]/Q]
create_generated_clock -name cm2_ib -source [get_pins i_system_wrapper/system_i/current_monitor_m2/inst/adc_clk_i] \
-divide_by 256 [get_pins i_system_wrapper/system_i/current_monitor_m2/inst/ib_if/filter/word_count_reg[7]/Q]
create_generated_clock -name cm2_vbus -source [get_pins i_system_wrapper/system_i/current_monitor_m2/inst/adc_clk_i] \
-divide_by 256 [get_pins i_system_wrapper/system_i/current_monitor_m2/inst/vbus_if/filter/word_count_reg[7]/Q]
set_clock_groups -asynchronous \
-group [get_clocks {cm1_ia cm1_ib cm1_vbus }]
set_clock_groups -asynchronous \
-group [get_clocks {cm2_ia cm2_ib cm2_vbus }]
set_clock_groups -asynchronous \
-group [get_clocks {pwm_ctrl_1 }] \
-group [get_clocks {pwm_ctrl_2 }]
# Ethernet 1
#IDELAY
set_property IDELAY_VALUE 16 [get_cells */*/gmii_to_rgmii_eth1/inst/*delay_rgmii_rx_ctl]