From 58953ff40d552f81b875c0045347f0de4d76eff7 Mon Sep 17 00:00:00 2001
From: David Winter <david.winter@analog.com>
Date: Mon, 3 May 2021 08:57:49 +0200
Subject: [PATCH] data_offload: Fix m_axis output stability issue

Signed-off-by: David Winter <david.winter@analog.com>
---
 library/common/ad_axis_inf_rx.v     | 5 ++++-
 library/data_offload/data_offload.v | 7 +++++--
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/library/common/ad_axis_inf_rx.v b/library/common/ad_axis_inf_rx.v
index 38dda7534..1dcf508d6 100644
--- a/library/common/ad_axis_inf_rx.v
+++ b/library/common/ad_axis_inf_rx.v
@@ -52,7 +52,9 @@ module ad_axis_inf_rx #(
   output  reg                     inf_valid = 1'b0,
   output  reg                     inf_last = 1'b0,
   output  reg [(DATA_WIDTH-1):0]  inf_data = {DATA_WIDTH{1'b0}},
-  input                           inf_ready);
+  input                           inf_ready,
+
+  output                          int_not_full);
 
   // internal registers
 
@@ -126,6 +128,7 @@ module ad_axis_inf_rx #(
   // read interface
 
   assign inf_ready_s = inf_ready | ~inf_valid;
+  assign int_not_full = inf_ready_s;
 
   always @(rcnt or wlast_0 or wdata_0 or wlast_1 or wdata_1 or
     wlast_2 or wdata_2 or wlast_3 or wdata_3 or wlast_4 or wdata_4 or
diff --git a/library/data_offload/data_offload.v b/library/data_offload/data_offload.v
index 39e34d22e..35f7a435b 100644
--- a/library/data_offload/data_offload.v
+++ b/library/data_offload/data_offload.v
@@ -186,6 +186,8 @@ module data_offload #(
   wire                                        src_wr_last_int_s;
   wire  [31:0]                                src_wr_last_beat_s;
 
+  wire                                        int_not_full;
+
   assign src_clk = s_axis_aclk;
   assign dst_clk = m_axis_aclk;
 
@@ -258,7 +260,7 @@ module data_offload #(
   end
   endgenerate
 
-  assign fifo_dst_ready_int_s = fifo_dst_ready & m_axis_ready;
+  assign fifo_dst_ready_int_s = fifo_dst_ready & int_not_full;
 
   assign fifo_src_wdata = s_axis_data;
   assign fifo_dst_ren = dst_mem_valid_s;
@@ -274,7 +276,8 @@ module data_offload #(
     .inf_valid (m_axis_valid_s),
     .inf_last (m_axis_last_s),
     .inf_data (m_axis_data_s),
-    .inf_ready (m_axis_ready));
+    .inf_ready (m_axis_ready),
+    .int_not_full(int_not_full));
 
   assign m_axis_valid = (dst_bypass_s) ? valid_bypass_s : m_axis_valid_s;
   assign m_axis_data  = (dst_bypass_s) ? data_bypass_s  : m_axis_data_s;