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axi_ad7616: Fix the data width of the AXI stream interface

main
Istvan Csomortani 2016-03-10 16:38:53 +02:00
parent a74e2061e9
commit 573146aa96
2 changed files with 2 additions and 3 deletions
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2
library/axi_ad7616/axi_ad7616.v
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@ -143,7 +143,7 @@ module axi_ad7616 (
output [31:0] s_axi_rdata; output [31:0] s_axi_rdata;
input s_axi_rready; input s_axi_rready;
output [31:0] m_axis_tdata; output [(NUM_OF_SDI * DATA_WIDTH-1):0] m_axis_tdata;
input m_axis_tready; input m_axis_tready;
output m_axis_tvalid; output m_axis_tvalid;
input m_axis_xfer_req; input m_axis_xfer_req;

3
projects/ad7616_sdz/common/ad7616_bd.tcl
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@ -30,7 +30,7 @@ set_property -dict [list CONFIG.DMA_TYPE_SRC {1}] $axi_ad7616_dma
set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_ad7616_dma set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_ad7616_dma
set_property -dict [list CONFIG.CYCLIC {0}] $axi_ad7616_dma set_property -dict [list CONFIG.CYCLIC {0}] $axi_ad7616_dma
set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad7616_dma set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_ad7616_dma
set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {32}] $axi_ad7616_dma set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {16}] $axi_ad7616_dma
set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad7616_dma set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_ad7616_dma
# interface connections # interface connections
@ -57,7 +57,6 @@ if {$ad7616_if == 0} {
ad_connect cnvst axi_ad7616/cnvst ad_connect cnvst axi_ad7616/cnvst
ad_connect busy axi_ad7616/busy ad_connect busy axi_ad7616/busy
} }
ad_connect sys_cpu_clk axi_ad7616_dma/s_axis_aclk ad_connect sys_cpu_clk axi_ad7616_dma/s_axis_aclk