mark axi_gpreg.v as systemverilog, otherwise it gives an error with vivado 2022.1

2022-05-17 13:46:30 +02:00 · 2022-05-17 13:46:30 +02:00 · 56a65b717c
parent 0c3ec108aa
commit 56a65b717c
1 changed files with 2 additions and 0 deletions
--- a/library/axi_gpreg/axi_gpreg_ip.tcl
+++ b/library/axi_gpreg/axi_gpreg_ip.tcl
@ -14,6 +14,8 @@ adi_ip_files axi_gpreg [list \
  "axi_gpreg_clock_mon.v" \
  "axi_gpreg.v" ]
  
+set_property FILE_TYPE SystemVerilog [get_files "axi_gpreg.v"]
+
 adi_ip_properties axi_gpreg
 adi_ip_ttcl axi_gpreg "axi_gpreg_constr.ttcl"