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common/vck190: Initial version

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Laszlo Nagy 2021-09-29 16:06:49 +01:00 committed by Laszlo Nagy
parent 6a681b9e8d
commit 56a25afa68
2 changed files with 26 additions and 0 deletions
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projects/common/vck190/vck190_system_bd.tcl Normal file
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source $ad_hdl_dir/projects/common/vmk180/vmk180_system_bd.tcl

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projects/common/vck190/vck190_system_constr.xdc Normal file
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create_clock -period 5.000 -name sys_clk_p [get_ports sys_clk_p]
set_property PACKAGE_PIN AF43 [get_ports sys_clk_n]
set_property PACKAGE_PIN AE42 [get_ports sys_clk_p]
# Define SPI clock
create_clock -name spi0_clk -period 40 [get_pins -hier */EMIOSPI0SCLKO]
create_clock -name spi1_clk -period 40 [get_pins -hier */EMIOSPI1SCLKO]
# GPIOs
# (switches, leds and such)
set_property -dict {PACKAGE_PIN H34 IOSTANDARD LVCMOS18} [get_ports gpio_led[0]] ; # DS6
set_property -dict {PACKAGE_PIN J33 IOSTANDARD LVCMOS18} [get_ports gpio_led[1]] ; # DS5
set_property -dict {PACKAGE_PIN K36 IOSTANDARD LVCMOS18} [get_ports gpio_led[2]] ; # DS4
set_property -dict {PACKAGE_PIN L35 IOSTANDARD LVCMOS18} [get_ports gpio_led[3]] ; # DS3
set_property -dict {PACKAGE_PIN J35 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[0]] ; # SW6.1
set_property -dict {PACKAGE_PIN J34 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[1]] ; # SW6.2
set_property -dict {PACKAGE_PIN H37 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[2]] ; # SW6.3
set_property -dict {PACKAGE_PIN H36 IOSTANDARD LVCMOS18} [get_ports gpio_dip_sw[3]] ; # SW6.4
set_property -dict {PACKAGE_PIN G37 IOSTANDARD LVCMOS18} [get_ports gpio_pb[0]] ; # SW4
set_property -dict {PACKAGE_PIN G36 IOSTANDARD LVCMOS18} [get_ports gpio_pb[1]] ; # SW5