From 53fa4828370fe9c2f03b8c7ff83e5d702eb76d53 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Mon, 16 Oct 2017 10:46:58 +0100 Subject: [PATCH] ad7134_fmc: Initial commit --- projects/Makefile | 3 + projects/ad7134_fmc/Makefile | 21 ++ projects/ad7134_fmc/common/ad7134_bd.tcl | 128 +++++++++++ projects/ad7134_fmc/zed/Makefile | 90 ++++++++ projects/ad7134_fmc/zed/system_bd.tcl | 13 ++ projects/ad7134_fmc/zed/system_constr.xdc | 47 ++++ projects/ad7134_fmc/zed/system_project.tcl | 15 ++ projects/ad7134_fmc/zed/system_top.v | 249 +++++++++++++++++++++ 8 files changed, 566 insertions(+) create mode 100644 projects/ad7134_fmc/Makefile create mode 100644 projects/ad7134_fmc/common/ad7134_bd.tcl create mode 100644 projects/ad7134_fmc/zed/Makefile create mode 100644 projects/ad7134_fmc/zed/system_bd.tcl create mode 100644 projects/ad7134_fmc/zed/system_constr.xdc create mode 100644 projects/ad7134_fmc/zed/system_project.tcl create mode 100644 projects/ad7134_fmc/zed/system_top.v diff --git a/projects/Makefile b/projects/Makefile index b60252d68..8e1683206 100644 --- a/projects/Makefile +++ b/projects/Makefile @@ -9,6 +9,7 @@ all: -$(MAKE) -C ad5766_sdz all -$(MAKE) -C ad6676evb all + -$(MAKE) -C ad7134_fmc all -$(MAKE) -C ad738x_fmc all -$(MAKE) -C ad7616_sdz all -$(MAKE) -C ad77681evb all @@ -47,6 +48,7 @@ all: clean: $(MAKE) -C ad5766_sdz clean $(MAKE) -C ad6676evb clean + $(MAKE) -C ad7134_fmc clean $(MAKE) -C ad738x_fmc clean $(MAKE) -C ad7616_sdz clean $(MAKE) -C ad77681evb clean @@ -85,6 +87,7 @@ clean: clean-all: $(MAKE) -C ad5766_sdz clean-all $(MAKE) -C ad6676evb clean-all + $(MAKE) -C ad7134_fmc clean-all $(MAKE) -C ad738x_fmc clean-all $(MAKE) -C ad7616_sdz clean-all $(MAKE) -C ad77681evb clean-all diff --git a/projects/ad7134_fmc/Makefile b/projects/ad7134_fmc/Makefile new file mode 100644 index 000000000..1f0ff76cd --- /dev/null +++ b/projects/ad7134_fmc/Makefile @@ -0,0 +1,21 @@ +#################################################################################### +#################################################################################### +## Copyright 2011(c) Analog Devices, Inc. +## Auto-generated, do not modify! +#################################################################################### +#################################################################################### + +.PHONY: all clean clean-all +all: + -$(MAKE) -C zed all + + +clean: + $(MAKE) -C zed clean + + +clean-all: + $(MAKE) -C zed clean-all + +#################################################################################### +#################################################################################### diff --git a/projects/ad7134_fmc/common/ad7134_bd.tcl b/projects/ad7134_fmc/common/ad7134_bd.tcl new file mode 100644 index 000000000..f44a526fb --- /dev/null +++ b/projects/ad7134_fmc/common/ad7134_bd.tcl @@ -0,0 +1,128 @@ + +create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad713x_di +create_bd_port -dir I ad713x_odr +create_bd_port -dir O ad713x_sdpclk + +# create a SPI Engine architecture for the parallel data interface of AD713x +# this design supports AD7132/AD7134/AD7136 + +create_bd_cell -type hier dual_ad7134 +current_bd_instance /dual_ad7134 + + create_bd_pin -dir I -type clk clk + create_bd_pin -dir I -type rst resetn + create_bd_pin -dir I odr + create_bd_pin -dir O irq + create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi + create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE + + ad_ip_instance spi_engine_execution execution + ad_ip_parameter execution CONFIG.DATA_WIDTH $adc_resolution + ad_ip_parameter execution CONFIG.NUM_OF_CS 1 + ad_ip_parameter execution CONFIG.NUM_OF_SDI $adc_num_of_channels + + ad_ip_instance axi_spi_engine axi + ad_ip_parameter axi CONFIG.DATA_WIDTH $adc_resolution + ad_ip_parameter axi CONFIG.NUM_OF_SDI $adc_num_of_channels + ad_ip_parameter axi CONFIG.NUM_OFFLOAD 1 + + ad_ip_instance spi_engine_offload offload + ad_ip_parameter offload CONFIG.DATA_WIDTH $adc_resolution + ad_ip_parameter offload CONFIG.NUM_OF_SDI $adc_num_of_channels + ad_ip_parameter offload CONFIG.ASYNC_TRIG 1 + + ad_ip_instance spi_engine_interconnect interconnect + ad_ip_parameter interconnect CONFIG.DATA_WIDTH $adc_resolution + ad_ip_parameter interconnect CONFIG.NUM_OF_SDI $adc_num_of_channels + + if {$adc_resolution == 24} { + ad_ip_instance util_axis_upscale axis_upscaler + ad_ip_parameter axis_upscaler CONFIG.NUM_OF_CHANNELS $adc_num_of_channels + ad_ip_parameter axis_upscaler CONFIG.DATA_WIDTH 24 + ad_ip_parameter axis_upscaler CONFIG.UDATA_WIDTH 32 + ad_connect axis_upscaler/dfmt_enable GND + ad_connect axis_upscaler/dfmt_type GND + ad_connect axis_upscaler/dfmt_se GND + } + + ad_connect axi/spi_engine_offload_ctrl0 offload/spi_engine_offload_ctrl + ad_connect offload/spi_engine_ctrl interconnect/s0_ctrl + ad_connect axi/spi_engine_ctrl interconnect/s1_ctrl + ad_connect interconnect/m_ctrl execution/ctrl + if {$adc_resolution == 24} { + ad_connect offload/offload_sdi axis_upscaler/s_axis + ad_connect axis_upscaler/m_axis M_AXIS_SAMPLE + + ad_connect clk axis_upscaler/clk + ad_connect axi/spi_resetn axis_upscaler/resetn + } else { + ad_connect offload/offload_sdi M_AXIS_SAMPLE + } + + ad_connect execution/spi m_spi + + ad_connect clk offload/spi_clk + ad_connect clk offload/ctrl_clk + ad_connect clk execution/clk + ad_connect clk axi/s_axi_aclk + ad_connect clk axi/spi_clk + ad_connect clk interconnect/clk + + ad_connect axi/spi_resetn offload/spi_resetn + ad_connect axi/spi_resetn execution/resetn + ad_connect axi/spi_resetn interconnect/resetn + + ad_connect odr offload/trigger + + ad_connect resetn axi/s_axi_aresetn + ad_connect irq axi/irq + +current_bd_instance / + +# dma to receive data stream + +ad_ip_instance axi_dmac axi_ad7134_dma +ad_ip_parameter axi_ad7134_dma CONFIG.DMA_TYPE_SRC 1 +ad_ip_parameter axi_ad7134_dma CONFIG.DMA_TYPE_DEST 0 +ad_ip_parameter axi_ad7134_dma CONFIG.CYCLIC 0 +ad_ip_parameter axi_ad7134_dma CONFIG.SYNC_TRANSFER_START 0 +ad_ip_parameter axi_ad7134_dma CONFIG.AXI_SLICE_SRC 0 +ad_ip_parameter axi_ad7134_dma CONFIG.AXI_SLICE_DEST 1 +ad_ip_parameter axi_ad7134_dma CONFIG.DMA_2D_TRANSFER 0 +if {$adc_resolution == 24} { + ad_ip_parameter axi_ad7134_dma CONFIG.DMA_DATA_WIDTH_SRC [expr 32 * $adc_num_of_channels] +} else { + ad_ip_parameter axi_ad7134_dma CONFIG.DMA_DATA_WIDTH_SRC [expr $adc_resolution * $adc_num_of_channels] +} +ad_ip_parameter axi_ad7134_dma CONFIG.DMA_DATA_WIDTH_DEST 128 + +# sdpclk clock generator - default clk0_out is 50 MHz + +ad_ip_instance axi_clkgen axi_sdp_clkgen +ad_ip_parameter axi_sdp_clkgen CONFIG.CLKIN_PERIOD 10 +ad_ip_parameter axi_sdp_clkgen CONFIG.VCO_MUL 12 +ad_ip_parameter axi_sdp_clkgen CONFIG.VCO_DIV 2 +ad_ip_parameter axi_sdp_clkgen CONFIG.CLK0_DIV 12 + +ad_connect sys_cpu_clk dual_ad7134/clk +ad_connect sys_cpu_clk axi_ad7134_dma/s_axis_aclk +ad_connect sys_cpu_clk axi_sdp_clkgen/clk +ad_connect sys_cpu_resetn dual_ad7134/resetn +ad_connect sys_cpu_resetn axi_ad7134_dma/m_dest_axi_aresetn + +ad_connect dual_ad7134/m_spi ad713x_di +ad_connect dual_ad7134/odr ad713x_odr +ad_connect axi_ad7134_dma/s_axis dual_ad7134/M_AXIS_SAMPLE +ad_connect ad713x_sdpclk axi_sdp_clkgen/clk_0 + +ad_cpu_interconnect 0x44a00000 dual_ad7134/axi +ad_cpu_interconnect 0x44a30000 axi_ad7134_dma +ad_cpu_interconnect 0x44a40000 axi_sdp_clkgen + + +ad_cpu_interrupt "ps-13" "mb-13" axi_ad7134_dma/irq +ad_cpu_interrupt "ps-12" "mb-12" dual_ad7134/irq + +ad_mem_hp2_interconnect sys_cpu_clk sys_ps7/S_AXI_HP2 +ad_mem_hp2_interconnect sys_cpu_clk axi_ad7134_dma/m_dest_axi + diff --git a/projects/ad7134_fmc/zed/Makefile b/projects/ad7134_fmc/zed/Makefile new file mode 100644 index 000000000..b9897fb86 --- /dev/null +++ b/projects/ad7134_fmc/zed/Makefile @@ -0,0 +1,90 @@ +#################################################################################### +#################################################################################### +## Copyright 2011(c) Analog Devices, Inc. +## Auto-generated, do not modify! +#################################################################################### +#################################################################################### + +M_DEPS += system_top.v +M_DEPS += system_project.tcl +M_DEPS += system_constr.xdc +M_DEPS += system_bd.tcl +M_DEPS += ../common/ad7134_bd.tcl +M_DEPS += ../../scripts/adi_project.tcl +M_DEPS += ../../scripts/adi_env.tcl +M_DEPS += ../../scripts/adi_board.tcl +M_DEPS += ../../common/zed/zed_system_constr.xdc +M_DEPS += ../../common/zed/zed_system_bd.tcl +M_DEPS += ../../../library/xilinx/common/ad_iobuf.v +M_DEPS += ../../../library/axi_clkgen/axi_clkgen.xpr +M_DEPS += ../../../library/axi_dmac/axi_dmac.xpr +M_DEPS += ../../../library/axi_hdmi_tx/axi_hdmi_tx.xpr +M_DEPS += ../../../library/axi_i2s_adi/axi_i2s_adi.xpr +M_DEPS += ../../../library/axi_spdif_tx/axi_spdif_tx.xpr +M_DEPS += ../../../library/spi_engine/axi_spi_engine/axi_spi_engine.xpr +M_DEPS += ../../../library/spi_engine/spi_engine_execution/spi_engine_execution.xpr +M_DEPS += ../../../library/spi_engine/spi_engine_interconnect/spi_engine_interconnect.xpr +M_DEPS += ../../../library/spi_engine/spi_engine_offload/spi_engine_offload.xpr +M_DEPS += ../../../library/util_axis_upscale/util_axis_upscale.xpr +M_DEPS += ../../../library/util_i2c_mixer/util_i2c_mixer.xpr + +M_VIVADO := vivado -mode batch -source + +M_FLIST := *.cache +M_FLIST += *.data +M_FLIST += *.xpr +M_FLIST += *.log +M_FLIST += *.jou +M_FLIST += xgui +M_FLIST += *.runs +M_FLIST += *.srcs +M_FLIST += *.sdk +M_FLIST += *.hw +M_FLIST += *.sim +M_FLIST += .Xil +M_FLIST += *.ip_user_files + + + +.PHONY: all lib clean clean-all +all: lib ad7134_fmc_zed.sdk/system_top.hdf + + +clean: + rm -rf $(M_FLIST) + + +clean-all:clean + $(MAKE) -C ../../../library/axi_clkgen clean + $(MAKE) -C ../../../library/axi_dmac clean + $(MAKE) -C ../../../library/axi_hdmi_tx clean + $(MAKE) -C ../../../library/axi_i2s_adi clean + $(MAKE) -C ../../../library/axi_spdif_tx clean + $(MAKE) -C ../../../library/spi_engine/axi_spi_engine clean + $(MAKE) -C ../../../library/spi_engine/spi_engine_execution clean + $(MAKE) -C ../../../library/spi_engine/spi_engine_interconnect clean + $(MAKE) -C ../../../library/spi_engine/spi_engine_offload clean + $(MAKE) -C ../../../library/util_axis_upscale clean + $(MAKE) -C ../../../library/util_i2c_mixer clean + + +ad7134_fmc_zed.sdk/system_top.hdf: $(M_DEPS) + -rm -rf $(M_FLIST) + $(M_VIVADO) system_project.tcl >> ad7134_fmc_zed_vivado.log 2>&1 + + +lib: + $(MAKE) -C ../../../library/axi_clkgen + $(MAKE) -C ../../../library/axi_dmac + $(MAKE) -C ../../../library/axi_hdmi_tx + $(MAKE) -C ../../../library/axi_i2s_adi + $(MAKE) -C ../../../library/axi_spdif_tx + $(MAKE) -C ../../../library/spi_engine/axi_spi_engine + $(MAKE) -C ../../../library/spi_engine/spi_engine_execution + $(MAKE) -C ../../../library/spi_engine/spi_engine_interconnect + $(MAKE) -C ../../../library/spi_engine/spi_engine_offload + $(MAKE) -C ../../../library/util_axis_upscale + $(MAKE) -C ../../../library/util_i2c_mixer + +#################################################################################### +#################################################################################### diff --git a/projects/ad7134_fmc/zed/system_bd.tcl b/projects/ad7134_fmc/zed/system_bd.tcl new file mode 100644 index 000000000..c42f7b151 --- /dev/null +++ b/projects/ad7134_fmc/zed/system_bd.tcl @@ -0,0 +1,13 @@ + +source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl + +# specify ADC resolution -- the design supports 16/24/32 bit resolutions + +set adc_resolution 24 + +# ADC number of channels + +set adc_num_of_channels 8 + +source ../common/ad7134_bd.tcl + diff --git a/projects/ad7134_fmc/zed/system_constr.xdc b/projects/ad7134_fmc/zed/system_constr.xdc new file mode 100644 index 000000000..ed4c27bf6 --- /dev/null +++ b/projects/ad7134_fmc/zed/system_constr.xdc @@ -0,0 +1,47 @@ + +# ad713x SPI configuration interface + +set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS25} [get_ports ad713x_spi_sdi] ; ## FMC_LPC_LA03_P +set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS25} [get_ports ad713x_spi_sdo] ; ## FMC_LPC_LA04_N +set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS25} [get_ports ad713x_spi_sclk] ; ## FMC_LPC_LA01_CC_P +set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS25} [get_ports ad713x_spi_cs[0]] ; ## FMC_LPC_LA05_P +set_property -dict {PACKAGE_PIN K18 IOSTANDARD LVCMOS25} [get_ports ad713x_spi_cs[1]] ; ## FMC_LPC_LA05_N + +# ad713x data interface + +set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS25} [get_ports ad713x_dclk] ; ## FMC_LPC_CLK0_M2C_P +set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS25} [get_ports ad713x_din[0]] ; ## FMC_LPC_LA00_CC_N +set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS25} [get_ports ad713x_din[1]] ; ## FMC_LPC_LA08_P +set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25} [get_ports ad713x_din[2]] ; ## FMC_LPC_LA02_P +set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25} [get_ports ad713x_din[3]] ; ## FMC_LPC_LA02_N +set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS25} [get_ports ad713x_din[4]] ; ## FMC_LPC_LA06_N +set_property -dict {PACKAGE_PIN J22 IOSTANDARD LVCMOS25} [get_ports ad713x_din[5]] ; ## FMC_LPC_LA08_N +set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVCMOS25} [get_ports ad713x_din[6]] ; ## FMC_LPC_LA09_P +set_property -dict {PACKAGE_PIN R21 IOSTANDARD LVCMOS25} [get_ports ad713x_din[7]] ; ## FMC_LPC_LA09_N +set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25} [get_ports ad713x_odr] ; ## FMC_LPC_LA00_CC_P + +# ad713x GPIO lines + +set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS25} [get_ports ad713x_resetn[0]] ; ## FMC_LPC_LA16_P +set_property -dict {PACKAGE_PIN K21 IOSTANDARD LVCMOS25} [get_ports ad713x_resetn[1]] ; ## FMC_LPC_LA16_N +set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports ad713x_pdn[0]] ; ## FMC_LPC_LA07_P +set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS25} [get_ports ad713x_pdn[1]] ; ## FMC_LPC_LA07_N +set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS25} [get_ports ad713x_mode[0]] ; ## FMC_LPC_LA04_P +set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVCMOS25} [get_ports ad713x_mode[1]] ; ## FMC_LPC_LA03_N +set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[0]] ; ## FMC_LPC_LA10_P +set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[1]] ; ## FMC_LPC_LA10_N +set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[2]] ; ## FMC_LPC_LA11_P +set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[3]] ; ## FMC_LPC_LA11_N +set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[4]] ; ## FMC_LPC_LA12_P +set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[5]] ; ## FMC_LPC_LA12_N +set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[6]] ; ## FMC_LPC_LA13_P +set_property -dict {PACKAGE_PIN M17 IOSTANDARD LVCMOS25} [get_ports ad713x_gpio[7]] ; ## FMC_LPC_LA13_N +set_property -dict {PACKAGE_PIN K19 IOSTANDARD LVCMOS25} [get_ports ad713x_dclkio[0]] ; ## FMC_LPC_LA14_P +set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVCMOS25} [get_ports ad713x_dclkio[1]] ; ## FMC_LPC_LA15_P +set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVCMOS25} [get_ports ad713x_pinbspi] ; ## FMC_LPC_LA06_P +set_property -dict {PACKAGE_PIN K20 IOSTANDARD LVCMOS25} [get_ports ad713x_dclkmode] ; ## FMC_LPC_LA14_N + +# ad713x reference clock (not used by default) + +set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVCMOS25} [get_ports ad713x_sdpclk] ; ## FMC_LPC_LA01_CC_N + diff --git a/projects/ad7134_fmc/zed/system_project.tcl b/projects/ad7134_fmc/zed/system_project.tcl new file mode 100644 index 000000000..10a2508cd --- /dev/null +++ b/projects/ad7134_fmc/zed/system_project.tcl @@ -0,0 +1,15 @@ + +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/projects/scripts/adi_project.tcl +source $ad_hdl_dir/projects/scripts/adi_board.tcl + +adi_project_xilinx ad7134_fmc_zed + +adi_project_files ad7134_fmc_zed [list \ + "$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \ + "system_top.v" \ + "system_constr.xdc" \ + "$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc"] + +adi_project_run ad7134_fmc_zed + diff --git a/projects/ad7134_fmc/zed/system_top.v b/projects/ad7134_fmc/zed/system_top.v new file mode 100644 index 000000000..1559e4bea --- /dev/null +++ b/projects/ad7134_fmc/zed/system_top.v @@ -0,0 +1,249 @@ +// *************************************************************************** +// *************************************************************************** +// Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved. +// +// In this HDL repository, there are many different and unique modules, consisting +// of various HDL (Verilog or VHDL) components. The individual modules are +// developed independently, and may be accompanied by separate and unique license +// terms. +// +// The user should read each of these license terms, and understand the +// freedoms and responsabilities that he or she has by using this source/core. +// +// This core is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +// A PARTICULAR PURPOSE. +// +// Redistribution and use of source or resulting binaries, with or without modification +// of this file, are permitted under one of the following two license terms: +// +// 1. The GNU General Public License version 2 as published by the +// Free Software Foundation, which can be found in the top level directory +// of this repository (LICENSE_GPL2), and also online at: +// +// +// OR +// +// 2. An ADI specific BSD license, which can be found in the top level directory +// of this repository (LICENSE_ADIBSD), and also on-line at: +// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD +// This will allow to generate bit files and not release the source code, +// as long as it attaches to an ADI device. +// +// *************************************************************************** +// *************************************************************************** + +`timescale 1ns/100ps + +module system_top ( + + inout [14:0] ddr_addr, + inout [ 2:0] ddr_ba, + inout ddr_cas_n, + inout ddr_ck_n, + inout ddr_ck_p, + inout ddr_cke, + inout ddr_cs_n, + inout [ 3:0] ddr_dm, + inout [31:0] ddr_dq, + inout [ 3:0] ddr_dqs_n, + inout [ 3:0] ddr_dqs_p, + inout ddr_odt, + inout ddr_ras_n, + inout ddr_reset_n, + inout ddr_we_n, + + inout fixed_io_ddr_vrn, + inout fixed_io_ddr_vrp, + inout [53:0] fixed_io_mio, + inout fixed_io_ps_clk, + inout fixed_io_ps_porb, + inout fixed_io_ps_srstb, + + inout [31:0] gpio_bd, + + output hdmi_out_clk, + output hdmi_vsync, + output hdmi_hsync, + output hdmi_data_e, + output [15:0] hdmi_data, + + output spdif, + + output i2s_mclk, + output i2s_bclk, + output i2s_lrclk, + output i2s_sdata_out, + input i2s_sdata_in, + + + inout iic_scl, + inout iic_sda, + inout [ 1:0] iic_mux_scl, + inout [ 1:0] iic_mux_sda, + + input otg_vbusoc, + + // ad713x SPI configuration interface + + input ad713x_spi_sdi, + output ad713x_spi_sdo, + output ad713x_spi_sclk, + output [ 1:0] ad713x_spi_cs, + + // ad713x data interface + + output ad713x_dclk, + input [ 7:0] ad713x_din, + input ad713x_odr, + + // ad713x GPIO lines + + inout [ 1:0] ad713x_resetn, + inout [ 1:0] ad713x_pdn, + inout [ 1:0] ad713x_mode, + inout [ 7:0] ad713x_gpio, + inout [ 1:0] ad713x_dclkio, + inout ad713x_pinbspi, + inout ad713x_dclkmode, + + // ad713x reference clock (not used by default) + + output ad713x_sdpclk); + + // internal signals + + wire [63:0] gpio_i; + wire [63:0] gpio_o; + wire [63:0] gpio_t; + wire [ 1:0] iic_mux_scl_i_s; + wire [ 1:0] iic_mux_scl_o_s; + wire iic_mux_scl_t_s; + wire [ 1:0] iic_mux_sda_i_s; + wire [ 1:0] iic_mux_sda_o_s; + wire iic_mux_sda_t_s; + + // instantiations + + assign gpio_i[63:50] = gpio_o[63:50]; + ad_iobuf #( + .DATA_WIDTH(18) + ) i_iobuf_ad713x_gpio ( + .dio_t(gpio_t[49:32]), + .dio_i(gpio_o[49:32]), + .dio_o(gpio_i[49:32]), + .dio_p({ad713x_dclkmode, // [49] + ad713x_pinbspi, // [48] + ad713x_dclkio, // [47:46] + ad713x_gpio, // [45:38] + ad713x_mode, // [37:36] + ad713x_pdn, // [35:34] + ad713x_resetn})); // [33:32] + + ad_iobuf #( + .DATA_WIDTH(32) + ) i_iobuf ( + .dio_t(gpio_t[31:0]), + .dio_i(gpio_o[31:0]), + .dio_o(gpio_i[31:0]), + .dio_p(gpio_bd)); + + ad_iobuf #( + .DATA_WIDTH(2) + ) i_iic_mux_scl ( + .dio_t({iic_mux_scl_t_s, iic_mux_scl_t_s}), + .dio_i(iic_mux_scl_o_s), + .dio_o(iic_mux_scl_i_s), + .dio_p(iic_mux_scl)); + + ad_iobuf #( + .DATA_WIDTH(2) + ) i_iic_mux_sda ( + .dio_t({iic_mux_sda_t_s, iic_mux_sda_t_s}), + .dio_i(iic_mux_sda_o_s), + .dio_o(iic_mux_sda_i_s), + .dio_p(iic_mux_sda)); + + system_wrapper i_system_wrapper ( + .ddr_addr (ddr_addr), + .ddr_ba (ddr_ba), + .ddr_cas_n (ddr_cas_n), + .ddr_ck_n (ddr_ck_n), + .ddr_ck_p (ddr_ck_p), + .ddr_cke (ddr_cke), + .ddr_cs_n (ddr_cs_n), + .ddr_dm (ddr_dm), + .ddr_dq (ddr_dq), + .ddr_dqs_n (ddr_dqs_n), + .ddr_dqs_p (ddr_dqs_p), + .ddr_odt (ddr_odt), + .ddr_ras_n (ddr_ras_n), + .ddr_reset_n (ddr_reset_n), + .ddr_we_n (ddr_we_n), + .fixed_io_ddr_vrn (fixed_io_ddr_vrn), + .fixed_io_ddr_vrp (fixed_io_ddr_vrp), + .fixed_io_mio (fixed_io_mio), + .fixed_io_ps_clk (fixed_io_ps_clk), + .fixed_io_ps_porb (fixed_io_ps_porb), + .fixed_io_ps_srstb (fixed_io_ps_srstb), + .gpio_i (gpio_i), + .gpio_o (gpio_o), + .gpio_t (gpio_t), + .hdmi_data (hdmi_data), + .hdmi_data_e (hdmi_data_e), + .hdmi_hsync (hdmi_hsync), + .hdmi_out_clk (hdmi_out_clk), + .hdmi_vsync (hdmi_vsync), + .i2s_bclk (i2s_bclk), + .i2s_lrclk (i2s_lrclk), + .i2s_mclk (i2s_mclk), + .i2s_sdata_in (i2s_sdata_in), + .i2s_sdata_out (i2s_sdata_out), + .iic_fmc_scl_io (iic_scl), + .iic_fmc_sda_io (iic_sda), + .iic_mux_scl_i (iic_mux_scl_i_s), + .iic_mux_scl_o (iic_mux_scl_o_s), + .iic_mux_scl_t (iic_mux_scl_t_s), + .iic_mux_sda_i (iic_mux_sda_i_s), + .iic_mux_sda_o (iic_mux_sda_o_s), + .iic_mux_sda_t (iic_mux_sda_t_s), + .ps_intr_00 (1'b0), + .ps_intr_01 (1'b0), + .ps_intr_02 (1'b0), + .ps_intr_03 (1'b0), + .ps_intr_04 (1'b0), + .ps_intr_05 (1'b0), + .ps_intr_06 (1'b0), + .ps_intr_07 (1'b0), + .ps_intr_08 (1'b0), + .ps_intr_09 (1'b0), + .ps_intr_10 (1'b0), + .spi0_clk_i (ad713x_spi_sclk), + .spi0_clk_o (ad713x_spi_sclk), + .spi0_csn_0_o (ad713x_spi_cs[0]), + .spi0_csn_1_o (ad713x_spi_cs[1]), + .spi0_csn_i (1'b1), + .spi0_sdi_i (ad713x_spi_sdi), + .spi0_sdo_i (ad713x_spi_sdo), + .spi0_sdo_o (ad713x_spi_sdo), + .ad713x_di_sdo (), + .ad713x_di_sdo_t (), + .ad713x_di_sdi (ad713x_din[0]), + .ad713x_di_sdi_1 (ad713x_din[1]), + .ad713x_di_sdi_2 (ad713x_din[2]), + .ad713x_di_sdi_3 (ad713x_din[3]), + .ad713x_di_sdi_4 (ad713x_din[4]), + .ad713x_di_sdi_5 (ad713x_din[5]), + .ad713x_di_sdi_6 (ad713x_din[6]), + .ad713x_di_sdi_7 (ad713x_din[7]), + .ad713x_di_cs (), + .ad713x_di_sclk (ad713x_dclk), + .ad713x_odr (ad713x_odr), + .ad713x_sdpclk (ad713x_sdpclk), + .otg_vbusoc (otg_vbusoc), + .spdif (spdif)); + +endmodule + +// *************************************************************************** +// ***************************************************************************