fmcjesdadc1/a5soc -- xcvr frame work updates
parent
48ee720901
commit
53c2f0642b
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@ -1,8 +1,22 @@
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create_clock -period "4.000 ns" -name clk_250m [get_ports {ref_clk}]
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create_clock -period "4.000 ns" -name ref_clk [get_ports {ref_clk}]
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create_clock -period "20.000 ns" -name sys_cpu_clk [get_pins {i_system_bd|sys_hps|fpga_interfaces|clocks_resets|h2f_user0_clk}]
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create_clock -period "10.000 ns" -name sys_dma_clk [get_pins {i_system_bd|sys_hps|fpga_interfaces|clocks_resets|h2f_user1_clk}]
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derive_pll_clocks
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derive_clock_uncertainty
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set_false_path -to [get_registers {rx_sysref_m1}]
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set_false_path -from [get_clocks {sys_cpu_clk}] -through [get_nets *altera_jesd204_rx_ctl_inst*]\
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-to [get_clocks {i_system_bd|avl_ad9250_xcvr|alt_core_pll|altera_pll_i|arriav_pll|counter[0].output_counter|divclk}]
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set_false_path -from [get_clocks {i_system_bd|avl_ad9250_xcvr|alt_core_pll|altera_pll_i|arriav_pll|counter[0].output_counter|divclk}]\
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-through [get_nets *altera_jesd204_rx_ctl_inst*] -to [get_clocks {sys_cpu_clk}]
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set_false_path -from [get_clocks {sys_cpu_clk}] -through [get_nets *altera_jesd204_rx_csr_inst*]\
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-to [get_clocks {i_system_bd|avl_ad9250_xcvr|alt_core_pll|altera_pll_i|arriav_pll|counter[0].output_counter|divclk}]
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set_false_path -from [get_clocks {i_system_bd|avl_ad9250_xcvr|alt_core_pll|altera_pll_i|arriav_pll|counter[0].output_counter|divclk}]\
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-through [get_nets *altera_jesd204_rx_csr_inst*] -to [get_clocks {sys_cpu_clk}]
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@ -62,7 +62,6 @@ set_instance_assignment -name IO_STANDARD "2.5 V" -to spi_sdio
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set_instance_assignment -name QII_AUTO_PACKED_REGISTERS OFF -to * -entity up_xfer_cntrl
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set_instance_assignment -name QII_AUTO_PACKED_REGISTERS OFF -to * -entity up_xfer_status
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set_instance_assignment -name QII_AUTO_PACKED_REGISTERS OFF -to * -entity up_xcvr
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execute_flow -compile
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@ -41,179 +41,128 @@ module system_top (
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// hps
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ddr3_a,
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ddr3_ba,
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ddr3_ck_p,
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ddr3_ck_n,
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ddr3_cke,
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ddr3_cs_n,
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ddr3_ras_n,
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ddr3_cas_n,
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ddr3_we_n,
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ddr3_reset_n,
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ddr3_dq,
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ddr3_dqs_p,
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ddr3_dqs_n,
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ddr3_odt,
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ddr3_dm,
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ddr3_oct_rzqin,
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eth1_tx_clk,
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eth1_tx_ctl,
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eth1_txd0,
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eth1_txd1,
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eth1_txd2,
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eth1_txd3,
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eth1_rx_clk,
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eth1_rx_ctl,
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eth1_rxd0,
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eth1_rxd1,
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eth1_rxd2,
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eth1_rxd3,
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eth1_mdc,
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eth1_mdio,
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qspi_ss0,
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qspi_clk,
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qspi_io0,
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qspi_io1,
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qspi_io2,
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qspi_io3,
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sdio_clk,
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sdio_cmd,
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sdio_d0,
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sdio_d1,
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sdio_d2,
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sdio_d3,
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usb1_clk,
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usb1_stp,
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usb1_dir,
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usb1_nxt,
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usb1_d0,
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usb1_d1,
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usb1_d2,
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usb1_d3,
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usb1_d4,
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usb1_d5,
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usb1_d6,
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usb1_d7,
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uart0_rx,
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uart0_tx,
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output [ 14:0] ddr3_a,
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output [ 2:0] ddr3_ba,
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output ddr3_ck_p,
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output ddr3_ck_n,
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output ddr3_cke,
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output ddr3_cs_n,
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output ddr3_ras_n,
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output ddr3_cas_n,
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output ddr3_we_n,
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output ddr3_reset_n,
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inout [ 39:0] ddr3_dq,
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inout [ 4:0] ddr3_dqs_p,
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inout [ 4:0] ddr3_dqs_n,
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output ddr3_odt,
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output [ 4:0] ddr3_dm,
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input ddr3_oct_rzqin,
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output eth1_tx_clk,
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output eth1_tx_ctl,
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output eth1_txd0,
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output eth1_txd1,
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output eth1_txd2,
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output eth1_txd3,
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input eth1_rx_clk,
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input eth1_rx_ctl,
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input eth1_rxd0,
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input eth1_rxd1,
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input eth1_rxd2,
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input eth1_rxd3,
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output eth1_mdc,
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inout eth1_mdio,
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output qspi_ss0,
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output qspi_clk,
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inout qspi_io0,
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inout qspi_io1,
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inout qspi_io2,
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inout qspi_io3,
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output sdio_clk,
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inout sdio_cmd,
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inout sdio_d0,
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inout sdio_d1,
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inout sdio_d2,
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inout sdio_d3,
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input usb1_clk,
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output usb1_stp,
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input usb1_dir,
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input usb1_nxt,
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inout usb1_d0,
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inout usb1_d1,
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inout usb1_d2,
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inout usb1_d3,
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inout usb1_d4,
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inout usb1_d5,
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inout usb1_d6,
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inout usb1_d7,
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input uart0_rx,
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output uart0_tx,
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// board gpio
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gpio_bd,
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output [ 3:0] gpio_bd_o,
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input [ 7:0] gpio_bd_i,
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// i2c
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fmc_a_scl,
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fmc_a_sda,
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inout fmca_scl,
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inout fmca_sda,
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// lane interface
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ref_clk,
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rx_data,
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rx_sync,
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rx_sysref,
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input ref_clk,
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input [ 3:0] rx_data,
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output rx_sync,
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output rx_sysref,
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// spi
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spi_csn,
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spi_clk,
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spi_sdio);
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output spi_csn,
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output spi_clk,
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inout spi_sdio);
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// hps
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// internal registers
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output [ 14:0] ddr3_a;
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output [ 2:0] ddr3_ba;
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output ddr3_ck_p;
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output ddr3_ck_n;
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output ddr3_cke;
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output ddr3_cs_n;
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output ddr3_ras_n;
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output ddr3_cas_n;
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output ddr3_we_n;
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output ddr3_reset_n;
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inout [ 39:0] ddr3_dq;
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inout [ 4:0] ddr3_dqs_p;
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inout [ 4:0] ddr3_dqs_n;
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output ddr3_odt;
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output [ 4:0] ddr3_dm;
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input ddr3_oct_rzqin;
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output eth1_tx_clk;
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output eth1_tx_ctl;
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output eth1_txd0;
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output eth1_txd1;
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output eth1_txd2;
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output eth1_txd3;
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input eth1_rx_clk;
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input eth1_rx_ctl;
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input eth1_rxd0;
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input eth1_rxd1;
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input eth1_rxd2;
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input eth1_rxd3;
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output eth1_mdc;
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inout eth1_mdio;
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output qspi_ss0;
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output qspi_clk;
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inout qspi_io0;
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inout qspi_io1;
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inout qspi_io2;
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inout qspi_io3;
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output sdio_clk;
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inout sdio_cmd;
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inout sdio_d0;
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inout sdio_d1;
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inout sdio_d2;
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inout sdio_d3;
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input usb1_clk;
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output usb1_stp;
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input usb1_dir;
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input usb1_nxt;
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inout usb1_d0;
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inout usb1_d1;
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inout usb1_d2;
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inout usb1_d3;
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inout usb1_d4;
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inout usb1_d5;
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inout usb1_d6;
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inout usb1_d7;
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input uart0_rx;
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output uart0_tx;
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// board gpio
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inout [ 11:0] gpio_bd;
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// i2c
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inout fmc_a_scl;
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inout fmc_a_sda;
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// lane interface
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input ref_clk;
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input [ 3:0] rx_data;
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output rx_sync;
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output rx_sysref;
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// spi
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output spi_csn;
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output spi_clk;
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inout spi_sdio;
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reg rx_sysref_m1 = 'd0;
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reg rx_sysref_m2 = 'd0;
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reg rx_sysref_int = 'd0;
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// internal signals
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wire sys_cpu_clk;
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wire sys_dma_clk;
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wire sys_rstn;
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wire rx_clk;
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wire [ 3:0] rx_ip_sof;
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wire [127:0] rx_ip_data;
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wire [ 63:0] gpio_i;
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wire [ 63:0] gpio_o;
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wire spi_mosi;
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wire spi_miso;
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wire fmc_a_scl_oe;
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wire fmc_a_sda_oe;
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wire fmca_scl_oe;
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wire fmca_sda_oe;
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// i2c
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assign fmc_a_scl = (fmc_a_scl_oe == 1'b1) ? 1'b0 : 1'bz;
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assign fmc_a_sda = (fmc_a_sda_oe == 1'b1) ? 1'b0 : 1'bz;
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assign fmca_scl = (fmca_scl_oe == 1'b1) ? 1'b0 : 1'bz;
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assign fmca_sda = (fmca_sda_oe == 1'b1) ? 1'b0 : 1'bz;
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// gpio
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assign gpio_i[63: 8] = gpio_o[63:8];
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assign gpio_i[ 7: 0] = gpio_bd_i;
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assign gpio_bd_o = gpio_o[11:8];
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// sysref
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assign rx_sysref = rx_sysref_int;
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always @(posedge rx_clk) begin
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rx_sysref_m1 <= gpio_o[12];
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rx_sysref_m2 <= rx_sysref_m1;
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rx_sysref_int <= rx_sysref_m1 & ~rx_sysref_m2;
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end
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// instantiations
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@ -224,90 +173,107 @@ module system_top (
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.spi_miso (spi_miso),
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.spi_sdio (spi_sdio));
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ad_iobuf #(.DATA_WIDTH(12)) i_iobuf_bd (
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.dio_t ({8'hff, 4'h0}),
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.dio_i (gpio_o[11:0]),
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.dio_o (gpio_i[11:0]),
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.dio_p (gpio_bd));
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system_bd i_system_bd (
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.a5soc_base_sys_gpio_bd_external_connection_in_port (gpio_i[63:32]),
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.a5soc_base_sys_gpio_bd_external_connection_out_port (gpio_o[63:32]),
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.a5soc_base_sys_gpio_external_connection_in_port (gpio_i[31:0]),
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.a5soc_base_sys_gpio_external_connection_out_port (gpio_o[31:0]),
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.a5soc_base_sys_hps_i2c0_out_data (fmc_a_sda_oe),
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.a5soc_base_sys_hps_i2c0_sda (fmc_a_sda),
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.a5soc_base_sys_hps_i2c0_clk_clk (fmc_a_scl_oe),
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.a5soc_base_sys_hps_i2c0_scl_in_clk (fmc_a_scl),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_TX_CLK (eth1_tx_clk),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_TXD0 (eth1_txd0),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_TXD1 (eth1_txd1),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_TX_CTL (eth1_tx_ctl),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_RXD0 (eth1_rxd0),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_RXD1 (eth1_rxd1),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_TXD2 (eth1_txd2),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_TXD3 (eth1_txd3),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_MDIO (eth1_mdio),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_MDC (eth1_mdc),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_RX_CTL (eth1_rx_ctl),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_RX_CLK (eth1_rx_clk),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_RXD2 (eth1_rxd2),
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.a5soc_base_sys_hps_io_hps_io_emac1_inst_RXD3 (eth1_rxd3),
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.a5soc_base_sys_hps_io_hps_io_qspi_inst_IO0 (qspi_io0),
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.a5soc_base_sys_hps_io_hps_io_qspi_inst_IO1 (qspi_io1),
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.a5soc_base_sys_hps_io_hps_io_qspi_inst_IO2 (qspi_io2),
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.a5soc_base_sys_hps_io_hps_io_qspi_inst_IO3 (qspi_io3),
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.a5soc_base_sys_hps_io_hps_io_qspi_inst_SS0 (qspi_ss0),
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.a5soc_base_sys_hps_io_hps_io_qspi_inst_CLK (qspi_clk),
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.a5soc_base_sys_hps_io_hps_io_sdio_inst_CMD (sdio_cmd),
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.a5soc_base_sys_hps_io_hps_io_sdio_inst_D0 (sdio_d0),
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.a5soc_base_sys_hps_io_hps_io_sdio_inst_D1 (sdio_d1),
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.a5soc_base_sys_hps_io_hps_io_sdio_inst_CLK (sdio_clk),
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.a5soc_base_sys_hps_io_hps_io_sdio_inst_D2 (sdio_d2),
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.a5soc_base_sys_hps_io_hps_io_sdio_inst_D3 (sdio_d3),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D0 (usb1_d0),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D1 (usb1_d1),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D2 (usb1_d2),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D3 (usb1_d3),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D4 (usb1_d4),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D5 (usb1_d5),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D6 (usb1_d6),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_D7 (usb1_d7),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_CLK (usb1_clk),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_STP (usb1_stp),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_DIR (usb1_dir),
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.a5soc_base_sys_hps_io_hps_io_usb1_inst_NXT (usb1_nxt),
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.a5soc_base_sys_hps_io_hps_io_uart0_inst_RX (uart0_rx),
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.a5soc_base_sys_hps_io_hps_io_uart0_inst_TX (uart0_tx),
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.a5soc_base_sys_hps_memory_mem_a (ddr3_a),
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.a5soc_base_sys_hps_memory_mem_ba (ddr3_ba),
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.a5soc_base_sys_hps_memory_mem_ck (ddr3_ck_p),
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.a5soc_base_sys_hps_memory_mem_ck_n (ddr3_ck_n),
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.a5soc_base_sys_hps_memory_mem_cke (ddr3_cke),
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.a5soc_base_sys_hps_memory_mem_cs_n (ddr3_cs_n),
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.a5soc_base_sys_hps_memory_mem_ras_n (ddr3_ras_n),
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.a5soc_base_sys_hps_memory_mem_cas_n (ddr3_cas_n),
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.a5soc_base_sys_hps_memory_mem_we_n (ddr3_we_n),
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.a5soc_base_sys_hps_memory_mem_reset_n (ddr3_reset_n),
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.a5soc_base_sys_hps_memory_mem_dq (ddr3_dq),
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.a5soc_base_sys_hps_memory_mem_dqs (ddr3_dqs_p),
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.a5soc_base_sys_hps_memory_mem_dqs_n (ddr3_dqs_n),
|
||||
.a5soc_base_sys_hps_memory_mem_odt (ddr3_odt),
|
||||
.a5soc_base_sys_hps_memory_mem_dm (ddr3_dm),
|
||||
.a5soc_base_sys_hps_memory_oct_rzqin (ddr3_oct_rzqin),
|
||||
.a5soc_base_sys_hps_spim0_txd (spi_mosi),
|
||||
.a5soc_base_sys_hps_spim0_rxd (spi_miso),
|
||||
.a5soc_base_sys_hps_spim0_ss_in_n (1'b1),
|
||||
.a5soc_base_sys_hps_spim0_ssi_oe_n (spi_csn),
|
||||
.a5soc_base_sys_hps_spim0_ss_0_n (),
|
||||
.a5soc_base_sys_hps_spim0_ss_1_n (),
|
||||
.a5soc_base_sys_hps_spim0_ss_2_n (),
|
||||
.a5soc_base_sys_hps_spim0_ss_3_n (),
|
||||
.a5soc_base_sys_hps_spim0_sclk_out_clk (spi_clk),
|
||||
.fmcjesdadc1_rx_data_rx_serial_data (rx_data),
|
||||
.fmcjesdadc1_rx_ref_clk_clk (ref_clk),
|
||||
.fmcjesdadc1_rx_sync_rx_sync (rx_sync),
|
||||
.fmcjesdadc1_rx_sysref_rx_ext_sysref_out (rx_sysref));
|
||||
.rx_core_clk_clk (rx_clk),
|
||||
.rx_data_0_rx_serial_data (rx_data[0]),
|
||||
.rx_data_1_rx_serial_data (rx_data[1]),
|
||||
.rx_data_2_rx_serial_data (rx_data[2]),
|
||||
.rx_data_3_rx_serial_data (rx_data[3]),
|
||||
.rx_ip_data_data (rx_ip_data),
|
||||
.rx_ip_data_valid (),
|
||||
.rx_ip_data_ready (1'b1),
|
||||
.rx_ip_data_0_data (rx_ip_data[63:0]),
|
||||
.rx_ip_data_0_valid (1'b1),
|
||||
.rx_ip_data_0_ready (),
|
||||
.rx_ip_data_1_data (rx_ip_data[127:64]),
|
||||
.rx_ip_data_1_valid (1'b1),
|
||||
.rx_ip_data_1_ready (),
|
||||
.rx_ip_sof_export (rx_ip_sof),
|
||||
.rx_ip_sof_0_export (rx_ip_sof),
|
||||
.rx_ip_sof_1_export (rx_ip_sof),
|
||||
.rx_ref_clk_clk (ref_clk),
|
||||
.rx_sync_export (rx_sync),
|
||||
.rx_sysref_export (rx_sysref_int),
|
||||
.sys_clk_clk (sys_cpu_clk),
|
||||
.sys_dma_clk_clk (sys_dma_clk),
|
||||
.sys_dma_rst_reset_n (sys_rstn),
|
||||
.sys_gpio_bd_in_port (gpio_i[31:0]),
|
||||
.sys_gpio_bd_out_port (gpio_o[31:0]),
|
||||
.sys_gpio_in_export (gpio_i[63:32]),
|
||||
.sys_gpio_out_export (gpio_o[63:32]),
|
||||
.sys_hps_cpu_clk_clk (sys_cpu_clk),
|
||||
.sys_hps_ddr3_mem_a (ddr3_a),
|
||||
.sys_hps_ddr3_mem_ba (ddr3_ba),
|
||||
.sys_hps_ddr3_mem_ck (ddr3_ck_p),
|
||||
.sys_hps_ddr3_mem_ck_n (ddr3_ck_n),
|
||||
.sys_hps_ddr3_mem_cke (ddr3_cke),
|
||||
.sys_hps_ddr3_mem_cs_n (ddr3_cs_n),
|
||||
.sys_hps_ddr3_mem_ras_n (ddr3_ras_n),
|
||||
.sys_hps_ddr3_mem_cas_n (ddr3_cas_n),
|
||||
.sys_hps_ddr3_mem_we_n (ddr3_we_n),
|
||||
.sys_hps_ddr3_mem_reset_n (ddr3_reset_n),
|
||||
.sys_hps_ddr3_mem_dq (ddr3_dq),
|
||||
.sys_hps_ddr3_mem_dqs (ddr3_dqs_p),
|
||||
.sys_hps_ddr3_mem_dqs_n (ddr3_dqs_n),
|
||||
.sys_hps_ddr3_mem_odt (ddr3_odt),
|
||||
.sys_hps_ddr3_mem_dm (ddr3_dm),
|
||||
.sys_hps_ddr3_oct_rzqin (ddr3_oct_rzqin),
|
||||
.sys_hps_dma_clk_clk (sys_dma_clk),
|
||||
.sys_hps_i2c0_out_data (fmca_sda_oe),
|
||||
.sys_hps_i2c0_sda (fmca_sda),
|
||||
.sys_hps_i2c0_clk_clk (fmca_scl_oe),
|
||||
.sys_hps_i2c0_scl_clk (fmca_scl),
|
||||
.sys_hps_io_hps_io_emac1_inst_TX_CLK (eth1_tx_clk),
|
||||
.sys_hps_io_hps_io_emac1_inst_TXD0 (eth1_txd0),
|
||||
.sys_hps_io_hps_io_emac1_inst_TXD1 (eth1_txd1),
|
||||
.sys_hps_io_hps_io_emac1_inst_TX_CTL (eth1_tx_ctl),
|
||||
.sys_hps_io_hps_io_emac1_inst_RXD0 (eth1_rxd0),
|
||||
.sys_hps_io_hps_io_emac1_inst_RXD1 (eth1_rxd1),
|
||||
.sys_hps_io_hps_io_emac1_inst_TXD2 (eth1_txd2),
|
||||
.sys_hps_io_hps_io_emac1_inst_TXD3 (eth1_txd3),
|
||||
.sys_hps_io_hps_io_emac1_inst_MDIO (eth1_mdio),
|
||||
.sys_hps_io_hps_io_emac1_inst_MDC (eth1_mdc),
|
||||
.sys_hps_io_hps_io_emac1_inst_RX_CTL (eth1_rx_ctl),
|
||||
.sys_hps_io_hps_io_emac1_inst_RX_CLK (eth1_rx_clk),
|
||||
.sys_hps_io_hps_io_emac1_inst_RXD2 (eth1_rxd2),
|
||||
.sys_hps_io_hps_io_emac1_inst_RXD3 (eth1_rxd3),
|
||||
.sys_hps_io_hps_io_qspi_inst_IO0 (qspi_io0),
|
||||
.sys_hps_io_hps_io_qspi_inst_IO1 (qspi_io1),
|
||||
.sys_hps_io_hps_io_qspi_inst_IO2 (qspi_io2),
|
||||
.sys_hps_io_hps_io_qspi_inst_IO3 (qspi_io3),
|
||||
.sys_hps_io_hps_io_qspi_inst_SS0 (qspi_ss0),
|
||||
.sys_hps_io_hps_io_qspi_inst_CLK (qspi_clk),
|
||||
.sys_hps_io_hps_io_sdio_inst_CMD (sdio_cmd),
|
||||
.sys_hps_io_hps_io_sdio_inst_D0 (sdio_d0),
|
||||
.sys_hps_io_hps_io_sdio_inst_D1 (sdio_d1),
|
||||
.sys_hps_io_hps_io_sdio_inst_CLK (sdio_clk),
|
||||
.sys_hps_io_hps_io_sdio_inst_D2 (sdio_d2),
|
||||
.sys_hps_io_hps_io_sdio_inst_D3 (sdio_d3),
|
||||
.sys_hps_io_hps_io_usb1_inst_D0 (usb1_d0),
|
||||
.sys_hps_io_hps_io_usb1_inst_D1 (usb1_d1),
|
||||
.sys_hps_io_hps_io_usb1_inst_D2 (usb1_d2),
|
||||
.sys_hps_io_hps_io_usb1_inst_D3 (usb1_d3),
|
||||
.sys_hps_io_hps_io_usb1_inst_D4 (usb1_d4),
|
||||
.sys_hps_io_hps_io_usb1_inst_D5 (usb1_d5),
|
||||
.sys_hps_io_hps_io_usb1_inst_D6 (usb1_d6),
|
||||
.sys_hps_io_hps_io_usb1_inst_D7 (usb1_d7),
|
||||
.sys_hps_io_hps_io_usb1_inst_CLK (usb1_clk),
|
||||
.sys_hps_io_hps_io_usb1_inst_STP (usb1_stp),
|
||||
.sys_hps_io_hps_io_usb1_inst_DIR (usb1_dir),
|
||||
.sys_hps_io_hps_io_usb1_inst_NXT (usb1_nxt),
|
||||
.sys_hps_io_hps_io_uart0_inst_RX (uart0_rx),
|
||||
.sys_hps_io_hps_io_uart0_inst_TX (uart0_tx),
|
||||
.sys_hps_rstn_reset_n (sys_rstn),
|
||||
.sys_hps_spim0_txd (spi_mosi),
|
||||
.sys_hps_spim0_rxd (spi_miso),
|
||||
.sys_hps_spim0_ss_in_n (1'b1),
|
||||
.sys_hps_spim0_ssi_oe_n (spi_csn),
|
||||
.sys_hps_spim0_ss_0_n (),
|
||||
.sys_hps_spim0_ss_1_n (),
|
||||
.sys_hps_spim0_ss_2_n (),
|
||||
.sys_hps_spim0_ss_3_n (),
|
||||
.sys_hps_spim0_sclk_clk (spi_clk),
|
||||
.sys_rst_reset_n (sys_rstn));
|
||||
|
||||
endmodule
|
||||
|
||||
|
|
Loading…
Reference in New Issue