zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

common/a10soc- add project create tcl procedure

main
Rejeesh Kutty 2017-06-06 12:24:13 -04:00
parent f278b6e6c9
commit 5176e427a1
2 changed files with 4 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
projects/common/a10soc/a10soc_system_assign.tcl
View File

@ -1,14 +1,4 @@
# device settings
set_global_assignment -name FAMILY "Arria 10"
set_global_assignment -name DEVICE 10AS066N3F40E2SGE2
# ignored warnings and such
set_global_assignment -name MESSAGE_DISABLE 17951 ; ## disable unused RX channels message
set_global_assignment -name MESSAGE_DISABLE 18655 ; ## disable unused TX channels message
# a10soc carrier defaults
# clocks and resets
set_location_assignment PIN_AM10 -to sys_clk
@ -259,6 +249,3 @@ set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_gpio[1]
set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_gpio[2]
set_instance_assignment -name IO_STANDARD "1.8 V" -to hps_gpio[3]
# source defaults
source $ad_hdl_dir/projects/common/altera/sys_gen.tcl

9
projects/common/a10soc/a10soc_system_qsys.tcl
View File

@ -1,12 +1,9 @@
package require qsys
set_module_property NAME {system_bd}
set_project_property DEVICE_FAMILY {Arria 10}
set_project_property DEVICE {10AS066N3F40E2SGE2}
# a10soc carrier qsys
set system_type a10soc
# clock-&-reset
add_instance sys_clk clock_source
add_interface sys_clk clock sink
set_interface_property sys_clk EXPORT_OF sys_clk.clk_in