fmcomms2_zc706: Update project with the new TDD sync interface
parent
85ffc25ec5
commit
510f1cfdd9
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@ -20,8 +20,9 @@ create_bd_port -dir O txnrx
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create_bd_port -dir I up_enable
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create_bd_port -dir I up_txnrx
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create_bd_port -dir O tdd_sync_out
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create_bd_port -dir I tdd_sync_in
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create_bd_port -dir O tdd_sync_o
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create_bd_port -dir I tdd_sync_i
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create_bd_port -dir O tdd_sync_t
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# ad9361 core
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@ -142,8 +143,9 @@ ad_connect util_ad9361_dac_upack/dac_data_3 axi_ad9361/dac_data_q1
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ad_connect util_ad9361_dac_upack/dac_valid axi_ad9361_dac_dma/fifo_rd_en
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ad_connect util_ad9361_dac_upack/dac_data axi_ad9361_dac_dma/fifo_rd_dout
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ad_connect axi_ad9361_dac_dma/fifo_rd_underflow axi_ad9361/dac_dunf
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ad_connect tdd_sync_out axi_ad9361/tdd_sync_out
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ad_connect tdd_sync_in axi_ad9361/tdd_sync_in
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ad_connect tdd_sync_o axi_ad9361/tdd_sync_o
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ad_connect tdd_sync_i axi_ad9361/tdd_sync_i
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ad_connect tdd_sync_t axi_ad9361/tdd_sync_t
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# interconnects
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@ -36,8 +36,7 @@ set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVDS_25} [get_ports tx_data_o
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set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[5]] ; ## H20 FMC_LPC_LA15_N
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set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports enable] ; ## G18 FMC_LPC_LA16_P
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set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports txnrx] ; ## G19 FMC_LPC_LA16_N
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set_property -dict {PACKAGE_PIN AC19 IOSTANDARD LVCMOS25} [get_ports tdd_sync_out] ; ## PMOD1_7_LS
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set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS25} [get_ports tdd_sync_in] ; ## PMOD1_5_LS
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set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVCMOS25} [get_ports tdd_sync] ; ## PMOD1_5_LS
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set_property -dict {PACKAGE_PIN AG26 IOSTANDARD LVCMOS25} [get_ports gpio_status[0]] ; ## G21 FMC_LPC_LA20_P
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set_property -dict {PACKAGE_PIN AG27 IOSTANDARD LVCMOS25} [get_ports gpio_status[1]] ; ## G22 FMC_LPC_LA20_N
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@ -91,8 +91,7 @@ module system_top (
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enable,
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txnrx,
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tdd_sync_out,
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tdd_sync_in,
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tdd_sync,
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gpio_muxout_tx,
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gpio_muxout_rx,
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@ -164,8 +163,7 @@ module system_top (
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output enable;
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output txnrx;
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output tdd_sync_out;
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input tdd_sync_in;
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inout tdd_sync;
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inout gpio_muxout_tx;
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inout gpio_muxout_rx;
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@ -211,6 +209,9 @@ module system_top (
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wire [31:0] adc_gpio_output;
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wire [31:0] dac_gpio_input;
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wire [31:0] dac_gpio_output;
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wire tdd_sync_t;
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wire tdd_sync_o;
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wire tdd_sync_i;
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// instantiations
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@ -232,6 +233,12 @@ module system_top (
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.dio_o (gpio_i[14:0]),
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.dio_p (gpio_bd));
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ad_iobuf #(.DATA_WIDTH(1)) i_iobuf_tdd_sync (
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.dio_t (tdd_sync_t),
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.dio_i (tdd_sync_o),
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.dio_o (tdd_sync_i),
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.dio_p (tdd_sync));
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system_wrapper i_system_wrapper (
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.ddr_addr (ddr_addr),
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.ddr_ba (ddr_ba),
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@ -302,8 +309,9 @@ module system_top (
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.spi1_sdi_i (1'b0),
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.spi1_sdo_i (spi_udc_data),
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.spi1_sdo_o (spi_udc_data),
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.tdd_sync_in (tdd_sync_in),
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.tdd_sync_out (tdd_sync_out),
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.tdd_sync_i (tdd_sync_i),
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.tdd_sync_o (tdd_sync_o),
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.tdd_sync_t (tdd_sync_t),
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.tx_clk_out_n (tx_clk_out_n),
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.tx_clk_out_p (tx_clk_out_p),
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.tx_data_out_n (tx_data_out_n),
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