axi_adc_trigger: Cosmetic change only
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bdd44e37df
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4fdaa7fe12
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@ -240,44 +240,44 @@ module axi_adc_trigger_reg (
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up_xfer_cntrl #(.DATA_WIDTH(274)) i_xfer_cntrl (
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.up_rstn (up_rstn),
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.up_clk (up_clk),
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.up_data_cntrl ({ up_streaming, // 1
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up_trigger_o, // 2
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up_io_selection, // 8
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up_config_trigger_i, // 10
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up_limit_a, // 16
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up_function_a, // 2
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up_hysteresis_a, // 32
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up_trigger_l_mix_a, // 4
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up_limit_b, // 16
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up_function_b, // 2
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up_hysteresis_b, // 32
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up_trigger_l_mix_b, // 4
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up_trigger_out_control, // 17
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up_fifo_depth, // 32
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up_trigger_holdoff, // 32
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up_trigger_out_hold_pins,// 32
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up_trigger_delay}), // 32
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.up_data_cntrl ({ up_streaming, // 1
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up_trigger_o, // 2
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up_io_selection, // 8
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up_config_trigger_i, // 10
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up_limit_a, // 16
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up_function_a, // 2
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up_hysteresis_a, // 32
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up_trigger_l_mix_a, // 4
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up_limit_b, // 16
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up_function_b, // 2
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up_hysteresis_b, // 32
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up_trigger_l_mix_b, // 4
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up_trigger_out_control, // 17
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up_fifo_depth, // 32
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up_trigger_holdoff, // 32
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up_trigger_out_hold_pins, // 32
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up_trigger_delay}), // 32
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.up_xfer_done (),
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.d_rst (1'b0),
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.d_clk (clk),
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.d_data_cntrl ({ streaming, // 1
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trigger_o, // 2
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io_selection, // 8
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config_trigger_i, // 10
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limit_a, // 16
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function_a, // 2
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hysteresis_a, // 32
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trigger_l_mix_a, // 4
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limit_b, // 16
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function_b, // 2
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hysteresis_b, // 32
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trigger_l_mix_b, // 4
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trigger_out_control,// 17
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fifo_depth, // 32
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trigger_holdoff, // 32
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trigger_out_hold_pins,// 32
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trigger_delay})); // 32
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.d_data_cntrl ({ streaming, // 1
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trigger_o, // 2
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io_selection, // 8
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config_trigger_i, // 10
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limit_a, // 16
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function_a, // 2
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hysteresis_a, // 32
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trigger_l_mix_a, // 4
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limit_b, // 16
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function_b, // 2
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hysteresis_b, // 32
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trigger_l_mix_b, // 4
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trigger_out_control, // 17
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fifo_depth, // 32
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trigger_holdoff, // 32
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trigger_out_hold_pins, // 32
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trigger_delay})); // 32
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endmodule
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