zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

vc707: define 125 MHz SGMII clock 

Constrain the clock path to 125 MHz corresponding to the output of
ICS844021I which has a 25 MHz reference.
main
Laszlo Nagy 2019-05-17 13:21:55 +01:00 committed by Laszlo Nagy
parent e9a171df5f
commit 4fca24d41f
1 changed files with 3 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
projects/common/vc707/vc707_system_constr.xdc
View File

@ -18,6 +18,9 @@ set_property PACKAGE_PIN AM7 [get_ports sgmii_rxn]
set_property PACKAGE_PIN AH8 [get_ports mgt_clk_p]
set_property PACKAGE_PIN AH7 [get_ports mgt_clk_n]
# Define the 125 MHz SGMII clock
create_clock -name mgt_clk -period 8.00 [get_ports mgt_clk_p]
set_property -dict {PACKAGE_PIN AJ33 IOSTANDARD LVCMOS18} [get_ports phy_rstn]
set_property -dict {PACKAGE_PIN AH31 IOSTANDARD LVCMOS18} [get_ports mdio_mdc]
set_property -dict {PACKAGE_PIN AK33 IOSTANDARD LVCMOS18} [get_ports mdio_mdio]