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ad_serdes- updates

main
Rejeesh Kutty 2016-09-14 11:12:53 -04:00
parent 631923e9f0
commit 4a6b554c0a
2 changed files with 28 additions and 27 deletions
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31
library/altera/common/ad_serdes_in.v
View File

@ -47,6 +47,7 @@ module ad_serdes_in (
input div_clk,
input loaden,
input hs_phase,
input locked,
// data interface
@ -81,21 +82,21 @@ module ad_serdes_in (
// instantiations
alt_serdes_in_core i_core (
.data_in (data_in_p),
.clk (clk),
.loaden (loaden),
.div_clk (div_clk),
.hs_phase (hs_phase),
.locked (locked),
.data_s ({data_s7,
data_s6,
data_s5,
data_s4,
data_s3,
data_s2,
data_s1,
data_s0}),
.delay_locked (delay_locked));
.clk_export (clk),
.div_clk_export (div_clk),
.hs_phase_export (hs_phase),
.loaden_export (loaden),
.locked_export (locked),
.data_in_export (data_in_p),
.data_s_export ({ data_s7,
data_s6,
data_s5,
data_s4,
data_s3,
data_s2,
data_s1,
data_s0}),
.delay_locked_export (delay_locked));
endmodule

24
library/altera/common/ad_serdes_out.v
View File

@ -80,18 +80,18 @@ module ad_serdes_out (
generate
for (l_inst = 0; l_inst < DATA_WIDTH; l_inst = l_inst + 1) begin: g_data
alt_serdes_out_core i_core (
.data_out (data_out_p[l_inst]),
.clk (clk),
.loaden (loaden),
.div_clk (div_clk),
.data_s ({data_s7[l_inst],
data_s6[l_inst],
data_s5[l_inst],
data_s4[l_inst],
data_s3[l_inst],
data_s2[l_inst],
data_s1[l_inst],
data_s0[l_inst]}));
.clk_export (clk),
.div_clk_export (div_clk),
.loaden_export (loaden),
.data_out_export (data_out_p[l_inst]),
.data_s_export ({ data_s7[l_inst],
data_s6[l_inst],
data_s5[l_inst],
data_s4[l_inst],
data_s3[l_inst],
data_s2[l_inst],
data_s1[l_inst],
data_s0[l_inst]}));
end
endgenerate