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scripts- reconnect added

main
Rejeesh Kutty 2016-09-29 11:49:17 -04:00
parent ffec95f220
commit 4a5b7fc723
1 changed files with 35 additions and 8 deletions
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43
projects/scripts/adi_board.tcl
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@ -132,16 +132,16 @@ proc ad_xcvrcon {u_xcvr a_xcvr a_jesd} {
set m [expr ($n + $index)] set m [expr ($n + $index)]
if {$tx_or_rx_n == 0} { if {$tx_or_rx_n == 0} {
ad_connect ${a_xcvr}/up_es_${m} ${u_xcvr}/up_es_${m} ad_connect ${a_xcvr}/up_es_${n} ${u_xcvr}/up_es_${m}
ad_connect ${a_jesd}/rxencommaalign_out ${u_xcvr}/${txrx}_calign_${m} ad_connect ${a_jesd}/rxencommaalign_out ${u_xcvr}/${txrx}_calign_${m}
} }
if {(($m%4) == 0) && ($qpll_enable == 1)} { if {(($m%4) == 0) && ($qpll_enable == 1)} {
ad_connect ${a_xcvr}/up_cm_${m} ${u_xcvr}/up_cm_${m} ad_connect ${a_xcvr}/up_cm_${n} ${u_xcvr}/up_cm_${m}
} }
ad_connect ${a_xcvr}/up_ch_${m} ${u_xcvr}/up_${txrx}_${m} ad_connect ${a_xcvr}/up_ch_${n} ${u_xcvr}/up_${txrx}_${m}
ad_connect ${u_xcvr}/${txrx}_${m} ${a_jesd}/gt${m}_${txrx} ad_connect ${u_xcvr}/${txrx}_${m} ${a_jesd}/gt${n}_${txrx}
ad_connect ${u_xcvr}/${txrx}_out_clk_${index} ${u_xcvr}/${txrx}_clk_${m} ad_connect ${u_xcvr}/${txrx}_out_clk_${index} ${u_xcvr}/${txrx}_clk_${m}
if {(($m%4) == 0) && ($qpll_enable == 1)} { if {(($m%4) == 0) && ($qpll_enable == 1)} {
@ -181,10 +181,32 @@ proc ad_disconnect {p_name_1 p_name_2} {
set m_name_2 [ad_connect_type $p_name_2] set m_name_2 [ad_connect_type $p_name_2]
if {[get_property CLASS $m_name_1] eq "bd_net"} { if {[get_property CLASS $m_name_1] eq "bd_net"} {
puts "disconnect_bd_net $m_name_1 $m_name_2"
disconnect_bd_net $m_name_1 $m_name_2 disconnect_bd_net $m_name_1 $m_name_2
return return
} }
}
proc ad_reconct {p_name_1 p_name_2} {
set m_name_1 [ad_connect_type $p_name_1]
set m_name_2 [ad_connect_type $p_name_2]
if {[get_property CLASS $m_name_1] eq "bd_pin"} {
delete_bd_objs -quiet [get_bd_nets -quiet -of_objects \
[find_bd_objs -relation connected_to $m_name_1]]
delete_bd_objs -quiet [get_bd_nets -quiet -of_objects \
[find_bd_objs -relation connected_to $m_name_2]]
}
if {[get_property CLASS $m_name_1] eq "bd_intf_pin"} {
delete_bd_objs -quiet [get_bd_intf_nets -quiet -of_objects \
[find_bd_objs -relation connected_to $m_name_1]]
delete_bd_objs -quiet [get_bd_intf_nets -quiet -of_objects \
[find_bd_objs -relation connected_to $m_name_2]]
}
ad_connect $p_name_1 $p_name_2
} }
################################################################################################### ###################################################################################################
@ -356,12 +378,17 @@ proc ad_mem_hpx_interconnect {p_sel p_clk p_name} {
set p_intf_clock "" set p_intf_clock ""
} }
regsub clk $p_clk resetn p_rst
if {[get_bd_nets -quiet $p_rst] eq ""} {
set p_rst sys_cpu_resetn
}
if {$m_interconnect_index == 0} { if {$m_interconnect_index == 0} {
set_property CONFIG.NUM_MI 1 $m_interconnect_cell set_property CONFIG.NUM_MI 1 $m_interconnect_cell
set_property CONFIG.NUM_SI 1 $m_interconnect_cell set_property CONFIG.NUM_SI 1 $m_interconnect_cell
ad_connect sys_cpu_resetn $m_interconnect_cell/ARESETN ad_connect $p_rst $m_interconnect_cell/ARESETN
ad_connect $p_clk $m_interconnect_cell/ACLK ad_connect $p_clk $m_interconnect_cell/ACLK
ad_connect sys_cpu_resetn $m_interconnect_cell/M00_ARESETN ad_connect $p_rst $m_interconnect_cell/M00_ARESETN
ad_connect $p_clk $m_interconnect_cell/M00_ACLK ad_connect $p_clk $m_interconnect_cell/M00_ACLK
ad_connect $m_interconnect_cell/M00_AXI $p_name_int ad_connect $m_interconnect_cell/M00_AXI $p_name_int
if {$p_intf_clock ne ""} { if {$p_intf_clock ne ""} {
@ -369,7 +396,7 @@ proc ad_mem_hpx_interconnect {p_sel p_clk p_name} {
} }
} else { } else {
set_property CONFIG.NUM_SI $m_interconnect_index $m_interconnect_cell set_property CONFIG.NUM_SI $m_interconnect_index $m_interconnect_cell
ad_connect sys_cpu_resetn $m_interconnect_cell/${i_str}_ARESETN ad_connect $p_rst $m_interconnect_cell/${i_str}_ARESETN
ad_connect $p_clk $m_interconnect_cell/${i_str}_ACLK ad_connect $p_clk $m_interconnect_cell/${i_str}_ACLK
ad_connect $m_interconnect_cell/${i_str}_AXI $p_name_int ad_connect $m_interconnect_cell/${i_str}_AXI $p_name_int
if {$p_intf_clock ne ""} { if {$p_intf_clock ne ""} {