ad_csc: Fix warning for axi_hdmi_tx
Converting from RGB to YCbCr takes one less stage than converting from YCbCr to RGB color space. Moving extra delay stage(5), of the sync signals to a particular YCbCr to RGB color space conversion case.main
parent
f0a29a682f
commit
498e07e640
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@ -79,7 +79,6 @@ module ad_csc #(
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reg [DELAY_DW-1:0] sync_2_m;
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reg [DELAY_DW-1:0] sync_3_m;
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reg [DELAY_DW-1:0] sync_4_m;
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reg [DELAY_DW-1:0] sync_5_m;
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reg [ 7:0] csc_data_d;
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@ -96,7 +95,6 @@ module ad_csc #(
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sync_2_m <= sync_1_m;
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sync_3_m <= sync_2_m;
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sync_4_m <= sync_3_m;
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sync_5_m <= sync_4_m;
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end
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assign color1 = {1'd0, data[23:16]};
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@ -120,6 +118,7 @@ module ad_csc #(
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generate
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// in RGB to YCbCr there are no overflows or underflows
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if (YCbCr_2_RGB) begin
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reg [DELAY_DW-1:0] sync_5_m;
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// output registers, output is unsigned (0 if sum is < 0) and saturated.
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// the inputs are expected to be 1.4.20 format (output is 8bits).
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@ -131,6 +130,7 @@ module ad_csc #(
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end else begin
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csc_data_d <= s_data_3[22:15];
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end
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sync_5_m <= sync_4_m;
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end
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assign csc_data = csc_data_d;
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assign csc_sync = sync_5_m;
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