util_wfifo: Changed some reset for several registers from asynchronous to synchronous for better integration with the FIFO

main
Adrian Costina 2015-09-16 18:55:47 +03:00
parent 70cea5b14e
commit 46808c4c41
1 changed files with 8 additions and 2 deletions

View File

@ -306,13 +306,19 @@ module util_wfifo (
if (dout_rstn == 1'b0) begin if (dout_rstn == 1'b0) begin
dout_enable_m <= 'd0; dout_enable_m <= 'd0;
dout_enable <= 'd0; dout_enable <= 'd0;
end else begin
dout_enable_m <= din_enable;
dout_enable <= dout_enable_m;
end
end
always @(posedge dout_clk) begin
if (dout_rstn == 1'b0) begin
dout_rd <= 'd0; dout_rd <= 'd0;
dout_rd_d <= 'd0; dout_rd_d <= 'd0;
dout_rdata_d <= 'd0; dout_rdata_d <= 'd0;
dout_raddr <= 'd0; dout_raddr <= 'd0;
end else begin end else begin
dout_enable_m <= din_enable;
dout_enable <= dout_enable_m;
dout_rd <= dout_rd_s; dout_rd <= dout_rd_s;
dout_rd_d <= dout_rd; dout_rd_d <= dout_rd;
dout_rdata_d <= dout_rdata_s; dout_rdata_d <= dout_rdata_s;