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pzsdr: Remove LED and button signals from PCIe carrier 

Only the FMC carrier and the breakout board do have push buttons and LEDs.
They are not present on the PCIe carrier. So move the constraints to a
separate file that can be included by the projects that need them and
remove all LED and button related signals from the PCIe project.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2016-07-14 17:09:20 +02:00
parent 3cff0fa7dc
commit 418217dd10
6 changed files with 21 additions and 26 deletions
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16
projects/common/pzsdr/pzsdr_bd_system_constr.xdc Normal file
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@ -0,0 +1,16 @@
# gpio
set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVCMOS18} [get_ports gpio_bd[0]] ; ## (pb) IO_L12N_T1_MRCC_33
set_property -dict {PACKAGE_PIN D8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[1]] ; ## (pb) IO_L8N_T1_34
set_property -dict {PACKAGE_PIN F9 IOSTANDARD LVCMOS18} [get_ports gpio_bd[2]] ; ## (pb) IO_L9P_T1_DQS_34
set_property -dict {PACKAGE_PIN E8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[3]] ; ## (pb) IO_L9N_T1_DQS_34
set_property -dict {PACKAGE_PIN A8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[4]] ; ## (led) IO_L17N_T2_34
set_property -dict {PACKAGE_PIN W14 IOSTANDARD LVCMOS25} [get_ports gpio_bd[5]] ; ## (led) IO_0_12
set_property -dict {PACKAGE_PIN W17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[6]] ; ## (led) IO_25_12
set_property -dict {PACKAGE_PIN Y16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[7]] ; ## (led) IO_L23P_T3_12
set_property -dict {PACKAGE_PIN Y15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[8]] ; ## (dip) IO_L23N_T3_12
set_property -dict {PACKAGE_PIN W16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[9]] ; ## (dip) IO_L24P_T3_12
set_property -dict {PACKAGE_PIN W15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[10]] ; ## (dip) IO_L24N_T3_12
set_property -dict {PACKAGE_PIN V19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[11]] ; ## (dip) IO_0_13

16
projects/common/pzsdr/pzsdr_system_constr.xdc
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@ -33,19 +33,3 @@ set_property -dict {PACKAGE_PIN K12 IOSTANDARD LVCMOS18} [get_ports clk_out]
set_property -dict {PACKAGE_PIN AF24 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_scl] ; ## IO_L5P_T0_13
set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_sda] ; ## IO_L5N_T0_13
# gpio
set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVCMOS18} [get_ports gpio_bd[0]] ; ## (pb) IO_L12N_T1_MRCC_33
set_property -dict {PACKAGE_PIN D8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[1]] ; ## (pb) IO_L8N_T1_34
set_property -dict {PACKAGE_PIN F9 IOSTANDARD LVCMOS18} [get_ports gpio_bd[2]] ; ## (pb) IO_L9P_T1_DQS_34
set_property -dict {PACKAGE_PIN E8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[3]] ; ## (pb) IO_L9N_T1_DQS_34
set_property -dict {PACKAGE_PIN A8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[4]] ; ## (led) IO_L17N_T2_34
set_property -dict {PACKAGE_PIN W14 IOSTANDARD LVCMOS25} [get_ports gpio_bd[5]] ; ## (led) IO_0_12
set_property -dict {PACKAGE_PIN W17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[6]] ; ## (led) IO_25_12
set_property -dict {PACKAGE_PIN Y16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[7]] ; ## (led) IO_L23P_T3_12
set_property -dict {PACKAGE_PIN Y15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[8]] ; ## (dip) IO_L23N_T3_12
set_property -dict {PACKAGE_PIN W16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[9]] ; ## (dip) IO_L24P_T3_12
set_property -dict {PACKAGE_PIN W15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[10]] ; ## (dip) IO_L24N_T3_12
set_property -dict {PACKAGE_PIN V19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[11]] ; ## (dip) IO_0_13

2
projects/pzsdr/ccbrk/system_project.tcl
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@ -11,9 +11,11 @@ adi_project_files ccbrk_pzsdr [list \
"system_constr.xdc"\
"$ad_hdl_dir/library/common/ad_iobuf.v" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_bd_system_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_lvds_system_constr.xdc" ]
set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc]
set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/pzsdr/pzsdr_bd_system_constr.xdc]
set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc]
adi_project_run ccbrk_pzsdr

1
projects/pzsdr/ccbrk_cmos/system_project.tcl
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@ -11,6 +11,7 @@ adi_project_files ccbrk_cmos_pzsdr [list \
"../ccbrk/system_constr.xdc"\
"$ad_hdl_dir/library/common/ad_iobuf.v" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_bd_system_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_cmos_system_constr.xdc" ]
adi_project_run ccbrk_cmos_pzsdr

2
projects/pzsdr/ccfmc/system_project.tcl
View File

@ -11,9 +11,11 @@ adi_project_files ccfmc_pzsdr [list \
"system_constr.xdc"\
"$ad_hdl_dir/library/common/ad_iobuf.v" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_bd_system_constr.xdc" \
"$ad_hdl_dir/projects/common/pzsdr/pzsdr_lvds_system_constr.xdc" ]
set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/pzsdr/pzsdr_system_constr.xdc]
set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/pzsdr/pzsdr_bd_system_constr.xdc]
set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc]
adi_project_run ccfmc_pzsdr

10
projects/pzsdr/ccpci/system_top.v
View File

@ -65,8 +65,6 @@ module system_top (
iic_scl,
iic_sda,
gpio_bd,
rx_clk_in_p,
rx_clk_in_n,
rx_frame_in_p,
@ -131,8 +129,6 @@ module system_top (
inout iic_scl;
inout iic_sda;
inout [11:0] gpio_bd;
input rx_clk_in_p;
input rx_clk_in_n;
input rx_frame_in_p;
@ -205,12 +201,6 @@ module system_top (
gpio_ctl, // 43:40
gpio_status})); // 39:32
ad_iobuf #(.DATA_WIDTH(12)) i_iobuf_bd (
.dio_t (gpio_t[11:0]),
.dio_i (gpio_o[11:0]),
.dio_o (gpio_i[11:0]),
.dio_p (gpio_bd));
system_wrapper i_system_wrapper (
.ddr_addr (ddr_addr),
.ddr_ba (ddr_ba),