ad_ip_jesd204_tpl_adc: make PN monitor more generic
parent
c34a304d3c
commit
41413a8ffe
|
@ -43,12 +43,16 @@ module ad_ip_jesd204_tpl_adc_pnmon #(
|
||||||
|
|
||||||
localparam DW = DATA_PATH_WIDTH*CHANNEL_WIDTH-1;
|
localparam DW = DATA_PATH_WIDTH*CHANNEL_WIDTH-1;
|
||||||
|
|
||||||
|
// Max width of largest PN and data width
|
||||||
|
localparam PN_W = DW > 22 ? DW : 22;
|
||||||
|
|
||||||
// internal registers
|
// internal registers
|
||||||
reg [DW:0] pn_data_pn = 'd0;
|
reg [PN_W:0] pn_data_pn = 'd0;
|
||||||
|
|
||||||
// internal signals
|
// internal signals
|
||||||
wire [DW:0] pn_data_pn_s;
|
wire [PN_W:0] pn_data_pn_s;
|
||||||
wire [DW:0] pn_data_in_s;
|
wire [DW:0] pn_data_in_s;
|
||||||
|
wire [PN_W:0] pn_data_init;
|
||||||
|
|
||||||
wire [DW:0] pn23;
|
wire [DW:0] pn23;
|
||||||
wire [DW+23:0] full_state_pn23;
|
wire [DW+23:0] full_state_pn23;
|
||||||
|
@ -56,8 +60,18 @@ module ad_ip_jesd204_tpl_adc_pnmon #(
|
||||||
wire [DW+9:0] full_state_pn9;
|
wire [DW+9:0] full_state_pn9;
|
||||||
|
|
||||||
// pn sequence select
|
// pn sequence select
|
||||||
|
generate if (PN_W > DW) begin
|
||||||
|
reg [PN_W-DW-1:0] pn_data_in_d = 'd0;
|
||||||
|
always @(posedge clk) begin
|
||||||
|
pn_data_in_d <= pn_data_in_s[PN_W-DW-1:0];
|
||||||
|
end
|
||||||
|
assign pn_data_init = {pn_data_in_d, pn_data_in_s};
|
||||||
|
end else begin
|
||||||
|
assign pn_data_init = pn_data_in_s;
|
||||||
|
end
|
||||||
|
endgenerate
|
||||||
|
|
||||||
assign pn_data_pn_s = (pn_oos == 1'b1) ? pn_data_in_s : pn_data_pn;
|
assign pn_data_pn_s = (pn_oos == 1'b1) ? pn_data_init : pn_data_pn;
|
||||||
|
|
||||||
wire tc = TWOS_COMPLEMENT ? 1'b1 : 1'b0;
|
wire tc = TWOS_COMPLEMENT ? 1'b1 : 1'b0;
|
||||||
|
|
||||||
|
@ -84,12 +98,13 @@ module ad_ip_jesd204_tpl_adc_pnmon #(
|
||||||
|
|
||||||
always @(posedge clk) begin
|
always @(posedge clk) begin
|
||||||
if (pn_seq_sel == 4'd0) begin
|
if (pn_seq_sel == 4'd0) begin
|
||||||
pn_data_pn <= pn9;
|
pn_data_pn <= PN_W > DW ? {pn_data_pn[PN_W-DW-1:0],pn9} : pn9;
|
||||||
end else begin
|
end else begin
|
||||||
pn_data_pn <= pn23;
|
pn_data_pn <= PN_W > DW ? {pn_data_pn[PN_W-DW-1:0],pn23} : pn23;
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
|
||||||
// pn oos & pn err
|
// pn oos & pn err
|
||||||
|
|
||||||
ad_pnmon #(
|
ad_pnmon #(
|
||||||
|
@ -98,7 +113,7 @@ module ad_ip_jesd204_tpl_adc_pnmon #(
|
||||||
.adc_clk (clk),
|
.adc_clk (clk),
|
||||||
.adc_valid_in (1'b1),
|
.adc_valid_in (1'b1),
|
||||||
.adc_data_in (pn_data_in_s),
|
.adc_data_in (pn_data_in_s),
|
||||||
.adc_data_pn (pn_data_pn),
|
.adc_data_pn (pn_data_pn[DW:0]),
|
||||||
.adc_pn_oos (pn_oos),
|
.adc_pn_oos (pn_oos),
|
||||||
.adc_pn_err (pn_err)
|
.adc_pn_err (pn_err)
|
||||||
);
|
);
|
||||||
|
|
Loading…
Reference in New Issue