usb_fx3: Delete unused project
parent
377848ef52
commit
3e18291d39
|
@ -40,7 +40,6 @@ all:
|
|||
-$(MAKE) -C m2k all
|
||||
-$(MAKE) -C motcon2_fmc all
|
||||
-$(MAKE) -C pluto all
|
||||
-$(MAKE) -C usb_fx3 all
|
||||
-$(MAKE) -C usdrx1 all
|
||||
-$(MAKE) -C usrpe31x all
|
||||
|
||||
|
@ -79,7 +78,6 @@ clean:
|
|||
$(MAKE) -C m2k clean
|
||||
$(MAKE) -C motcon2_fmc clean
|
||||
$(MAKE) -C pluto clean
|
||||
$(MAKE) -C usb_fx3 clean
|
||||
$(MAKE) -C usdrx1 clean
|
||||
$(MAKE) -C usrpe31x clean
|
||||
|
||||
|
@ -118,7 +116,6 @@ clean-all:
|
|||
$(MAKE) -C m2k clean-all
|
||||
$(MAKE) -C motcon2_fmc clean-all
|
||||
$(MAKE) -C pluto clean-all
|
||||
$(MAKE) -C usb_fx3 clean-all
|
||||
$(MAKE) -C usdrx1 clean-all
|
||||
$(MAKE) -C usrpe31x clean-all
|
||||
|
||||
|
|
|
@ -1,21 +0,0 @@
|
|||
####################################################################################
|
||||
####################################################################################
|
||||
## Copyright 2011(c) Analog Devices, Inc.
|
||||
## Auto-generated, do not modify!
|
||||
####################################################################################
|
||||
####################################################################################
|
||||
|
||||
.PHONY: all clean clean-all
|
||||
all:
|
||||
-$(MAKE) -C zc706 all
|
||||
|
||||
|
||||
clean:
|
||||
$(MAKE) -C zc706 clean
|
||||
|
||||
|
||||
clean-all:
|
||||
$(MAKE) -C zc706 clean-all
|
||||
|
||||
####################################################################################
|
||||
####################################################################################
|
|
@ -1,106 +0,0 @@
|
|||
|
||||
create_bd_port -dir I usb_fx3_uart_tx
|
||||
create_bd_port -dir O usb_fx3_uart_rx
|
||||
|
||||
create_bd_port -dir I dma_rdy
|
||||
create_bd_port -dir I dma_wmk
|
||||
create_bd_port -dir I -from 3 -to 0 fifo_rdy
|
||||
create_bd_port -dir O pclk
|
||||
create_bd_port -dir IO -from 31 -to 0 data
|
||||
create_bd_port -dir O -from 1 -to 0 addr
|
||||
create_bd_port -dir O slcs_n
|
||||
create_bd_port -dir O slrd_n
|
||||
create_bd_port -dir O sloe_n
|
||||
create_bd_port -dir O slwr_n
|
||||
create_bd_port -dir O pktend_n
|
||||
create_bd_port -dir O epswitch_n
|
||||
|
||||
ad_ip_instance axi_uartlite axi_uart
|
||||
ad_ip_parameter axi_uart CONFIG.C_BAUDRATE 115200
|
||||
|
||||
ad_ip_instance axi_usb_fx3 axi_usb_fx3
|
||||
|
||||
ad_ip_instance axi_dma axi_usb_fx3_dma
|
||||
ad_ip_parameter axi_usb_fx3_dma CONFIG.c_sg_include_stscntrl_strm 0
|
||||
ad_ip_parameter axi_usb_fx3_dma CONFIG.c_mm2s_burst_size 256
|
||||
ad_ip_parameter axi_usb_fx3_dma CONFIG.c_s2mm_burst_size 256
|
||||
ad_ip_parameter axi_usb_fx3_dma CONFIG.c_sg_length_width 16
|
||||
|
||||
ad_ip_instance axis_data_fifo usb_fx3_rx_axis_fifo
|
||||
|
||||
ad_ip_instance axi_intr_monitor intr_monitor
|
||||
|
||||
ad_connect axi_usb_fx3/s_axis axi_usb_fx3_dma/M_AXIS_MM2S
|
||||
|
||||
ad_connect sys_cpu_clk usb_fx3_rx_axis_fifo/s_axis_aclk
|
||||
ad_connect sys_cpu_resetn usb_fx3_rx_axis_fifo/s_axis_aresetn
|
||||
|
||||
ad_connect axi_usb_fx3/m_axis usb_fx3_rx_axis_fifo/S_AXIS
|
||||
ad_connect axi_usb_fx3_dma/S_AXIS_S2MM usb_fx3_rx_axis_fifo/M_AXIS
|
||||
|
||||
ad_connect axi_uart/rx usb_fx3_uart_tx
|
||||
ad_connect axi_uart/tx usb_fx3_uart_rx
|
||||
|
||||
ad_connect sys_cpu_clk axi_usb_fx3/s_axi_aclk
|
||||
ad_connect sys_cpu_resetn axi_usb_fx3/s_axi_aresetn
|
||||
|
||||
ad_connect axi_usb_fx3/dma_rdy dma_rdy
|
||||
ad_connect axi_usb_fx3/dma_wmk dma_wmk
|
||||
ad_connect axi_usb_fx3/fifo_rdy fifo_rdy
|
||||
ad_connect axi_usb_fx3/pclk pclk
|
||||
ad_connect axi_usb_fx3/data data
|
||||
ad_connect axi_usb_fx3/addr addr
|
||||
ad_connect axi_usb_fx3/slcs_n slcs_n
|
||||
ad_connect axi_usb_fx3/slrd_n slrd_n
|
||||
ad_connect axi_usb_fx3/sloe_n sloe_n
|
||||
ad_connect axi_usb_fx3/slwr_n slwr_n
|
||||
ad_connect axi_usb_fx3/pktend_n pktend_n
|
||||
ad_connect axi_usb_fx3/epswitch_n epswitch_n
|
||||
|
||||
ad_cpu_interrupt ps-13 mb-12 axi_usb_fx3/irq
|
||||
ad_cpu_interrupt ps-12 mb-13 axi_usb_fx3_dma/mm2s_introut
|
||||
ad_cpu_interrupt ps-11 mb-14 axi_usb_fx3_dma/s2mm_introut
|
||||
ad_cpu_interrupt ps-10 mb-15 axi_uart/interrupt
|
||||
ad_cpu_interrupt ps-9 mb-16 intr_monitor/irq
|
||||
|
||||
ad_cpu_interconnect 0x50000000 axi_usb_fx3
|
||||
ad_cpu_interconnect 0x40400000 axi_usb_fx3_dma
|
||||
ad_cpu_interconnect 0x40600000 axi_uart
|
||||
ad_cpu_interconnect 0x43c00000 intr_monitor
|
||||
|
||||
ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1
|
||||
ad_mem_hp1_interconnect sys_cpu_clk axi_usb_fx3_dma/M_AXI_SG
|
||||
ad_mem_hp1_interconnect sys_cpu_clk axi_usb_fx3_dma/M_AXI_MM2S
|
||||
ad_mem_hp1_interconnect sys_cpu_clk axi_usb_fx3_dma/M_AXI_S2MM
|
||||
|
||||
# test
|
||||
|
||||
ad_ip_instance ila ila
|
||||
|
||||
ad_ip_parameter ila CONFIG.C_MONITOR_TYPE Native
|
||||
ad_ip_parameter ila CONFIG.C_NUM_OF_PROBES 11
|
||||
ad_ip_parameter ila CONFIG.C_PROBE10_WIDTH 4
|
||||
ad_ip_parameter ila CONFIG.C_PROBE3_WIDTH 2
|
||||
ad_ip_parameter ila CONFIG.C_PROBE2_WIDTH 15
|
||||
ad_ip_parameter ila CONFIG.C_PROBE1_WIDTH 74
|
||||
ad_ip_parameter ila CONFIG.C_PROBE0_WIDTH 75
|
||||
ad_ip_parameter ila CONFIG.C_DATA_DEPTH 65536
|
||||
ad_ip_parameter ila CONFIG.C_EN_STRG_QUAL 1
|
||||
ad_ip_parameter ila CONFIG.C_PROBE2_MU_CNT 2
|
||||
ad_ip_parameter ila CONFIG.C_PROBE1_MU_CNT 2
|
||||
ad_ip_parameter ila CONFIG.C_PROBE0_MU_CNT 2
|
||||
ad_ip_parameter ila CONFIG.ALL_PROBE_SAME_MU_CNT 2
|
||||
ad_ip_parameter ila CONFIG.C_ENABLE_ILA_AXI_MON false
|
||||
|
||||
ad_connect ila/clk axi_usb_fx3/pclk
|
||||
ad_connect ila/probe0 axi_usb_fx3/debug_fx32dma
|
||||
ad_connect ila/probe1 axi_usb_fx3/debug_dma2fx3
|
||||
ad_connect ila/probe2 axi_usb_fx3/debug_status
|
||||
ad_connect ila/probe3 axi_usb_fx3/addr
|
||||
ad_connect ila/probe4 axi_usb_fx3/epswitch_n
|
||||
ad_connect ila/probe5 axi_usb_fx3/slcs_n
|
||||
ad_connect ila/probe6 axi_usb_fx3/slrd_n
|
||||
ad_connect ila/probe7 axi_usb_fx3/sloe_n
|
||||
ad_connect ila/probe8 axi_usb_fx3/slwr_n
|
||||
ad_connect ila/probe9 axi_usb_fx3/pktend_n
|
||||
ad_connect ila/probe10 fifo_rdy
|
|
@ -1,72 +0,0 @@
|
|||
####################################################################################
|
||||
####################################################################################
|
||||
## Copyright 2011(c) Analog Devices, Inc.
|
||||
## Auto-generated, do not modify!
|
||||
####################################################################################
|
||||
####################################################################################
|
||||
|
||||
M_DEPS += system_top.v
|
||||
M_DEPS += system_project.tcl
|
||||
M_DEPS += system_constr.xdc
|
||||
M_DEPS += system_bd.tcl
|
||||
M_DEPS += ../../usb_fx3/common/usb_fx3_bd.tcl
|
||||
M_DEPS += ../../scripts/adi_project.tcl
|
||||
M_DEPS += ../../scripts/adi_env.tcl
|
||||
M_DEPS += ../../scripts/adi_board.tcl
|
||||
M_DEPS += ../../common/zc706/zc706_system_constr.xdc
|
||||
M_DEPS += ../../common/zc706/zc706_system_bd.tcl
|
||||
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
|
||||
M_DEPS += ../../../library/axi_clkgen/axi_clkgen.xpr
|
||||
M_DEPS += ../../../library/axi_hdmi_tx/axi_hdmi_tx.xpr
|
||||
M_DEPS += ../../../library/axi_intr_monitor/axi_intr_monitor.xpr
|
||||
M_DEPS += ../../../library/axi_spdif_tx/axi_spdif_tx.xpr
|
||||
M_DEPS += ../../../library/axi_usb_fx3/axi_usb_fx3.xpr
|
||||
|
||||
M_VIVADO := vivado -mode batch -source
|
||||
|
||||
M_FLIST := *.cache
|
||||
M_FLIST += *.data
|
||||
M_FLIST += *.xpr
|
||||
M_FLIST += *.log
|
||||
M_FLIST += *.jou
|
||||
M_FLIST += xgui
|
||||
M_FLIST += *.runs
|
||||
M_FLIST += *.srcs
|
||||
M_FLIST += *.sdk
|
||||
M_FLIST += *.hw
|
||||
M_FLIST += *.sim
|
||||
M_FLIST += .Xil
|
||||
M_FLIST += *.ip_user_files
|
||||
|
||||
|
||||
|
||||
.PHONY: all lib clean clean-all
|
||||
all: lib usb_fx3_zc706.sdk/system_top.hdf
|
||||
|
||||
|
||||
clean:
|
||||
rm -rf $(M_FLIST)
|
||||
|
||||
|
||||
clean-all:clean
|
||||
$(MAKE) -C ../../../library/axi_clkgen clean
|
||||
$(MAKE) -C ../../../library/axi_hdmi_tx clean
|
||||
$(MAKE) -C ../../../library/axi_intr_monitor clean
|
||||
$(MAKE) -C ../../../library/axi_spdif_tx clean
|
||||
$(MAKE) -C ../../../library/axi_usb_fx3 clean
|
||||
|
||||
|
||||
usb_fx3_zc706.sdk/system_top.hdf: $(M_DEPS)
|
||||
-rm -rf $(M_FLIST)
|
||||
$(M_VIVADO) system_project.tcl >> usb_fx3_zc706_vivado.log 2>&1
|
||||
|
||||
|
||||
lib:
|
||||
$(MAKE) -C ../../../library/axi_clkgen
|
||||
$(MAKE) -C ../../../library/axi_hdmi_tx
|
||||
$(MAKE) -C ../../../library/axi_intr_monitor
|
||||
$(MAKE) -C ../../../library/axi_spdif_tx
|
||||
$(MAKE) -C ../../../library/axi_usb_fx3
|
||||
|
||||
####################################################################################
|
||||
####################################################################################
|
|
@ -1,4 +0,0 @@
|
|||
|
||||
source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl
|
||||
source $ad_hdl_dir/projects/usb_fx3/common/usb_fx3_bd.tcl
|
||||
|
|
@ -1,67 +0,0 @@
|
|||
|
||||
# constraints
|
||||
# USB_FX3
|
||||
|
||||
set_property -dict {PACKAGE_PIN AG17 IOSTANDARD LVCMOS25} [get_ports data[0]] ; ## H04 FMC_LPC_CLK0_M2C_P
|
||||
set_property -dict {PACKAGE_PIN AE12 IOSTANDARD LVCMOS25} [get_ports data[1]] ; ## H07 FMC_LPC_LA02_P
|
||||
set_property -dict {PACKAGE_PIN AF12 IOSTANDARD LVCMOS25} [get_ports data[2]] ; ## H08 FMC_LPC_LA02_N
|
||||
set_property -dict {PACKAGE_PIN AJ15 IOSTANDARD LVCMOS25} [get_ports data[3]] ; ## H10 FMC_LPC_LA04_P
|
||||
set_property -dict {PACKAGE_PIN AK15 IOSTANDARD LVCMOS25} [get_ports data[4]] ; ## H11 FMC_LPC_LA04_N
|
||||
set_property -dict {PACKAGE_PIN AA15 IOSTANDARD LVCMOS25} [get_ports data[5]] ; ## H13 FMC_LPC_LA07_P
|
||||
set_property -dict {PACKAGE_PIN AA14 IOSTANDARD LVCMOS25} [get_ports data[6]] ; ## H14 FMC_LPC_LA07_N
|
||||
set_property -dict {PACKAGE_PIN AJ16 IOSTANDARD LVCMOS25} [get_ports data[7]] ; ## H16 FMC_LPC_LA11_P
|
||||
set_property -dict {PACKAGE_PIN AK16 IOSTANDARD LVCMOS25} [get_ports data[8]] ; ## H17 FMC_LPC_LA11_N
|
||||
set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVCMOS25} [get_ports data[9]] ; ## H19 FMC_LPC_LA15_P
|
||||
set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVCMOS25} [get_ports data[10]] ; ## H20 FMC_LPC_LA15_N
|
||||
set_property -dict {PACKAGE_PIN AH26 IOSTANDARD LVCMOS25} [get_ports data[11]] ; ## H22 FMC_LPC_LA19_P
|
||||
set_property -dict {PACKAGE_PIN AH27 IOSTANDARD LVCMOS25} [get_ports data[12]] ; ## H23 FMC_LPC_LA19_N
|
||||
set_property -dict {PACKAGE_PIN AH28 IOSTANDARD LVCMOS25} [get_ports data[13]] ; ## H25 FMC_LPC_LA21_P
|
||||
set_property -dict {PACKAGE_PIN AH29 IOSTANDARD LVCMOS25} [get_ports data[14]] ; ## H26 FMC_LPC_LA21_N
|
||||
set_property -dict {PACKAGE_PIN AF30 IOSTANDARD LVCMOS25} [get_ports data[15]] ; ## H28 FMC_LPC_LA24_P
|
||||
set_property -dict {PACKAGE_PIN AG30 IOSTANDARD LVCMOS25} [get_ports data[16]] ; ## H29 FMC_LPC_LA24_N
|
||||
set_property -dict {PACKAGE_PIN AD25 IOSTANDARD LVCMOS25} [get_ports data[17]] ; ## H31 FMC_LPC_LA28_P
|
||||
set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVCMOS25} [get_ports data[18]] ; ## H32 FMC_LPC_LA28_N
|
||||
set_property -dict {PACKAGE_PIN AB29 IOSTANDARD LVCMOS25} [get_ports data[19]] ; ## H34 FMC_LPC_LA30_P
|
||||
set_property -dict {PACKAGE_PIN AB30 IOSTANDARD LVCMOS25} [get_ports data[20]] ; ## H35 FMC_LPC_LA30_N
|
||||
set_property -dict {PACKAGE_PIN Y26 IOSTANDARD LVCMOS25} [get_ports data[21]] ; ## H37 FMC_LPC_LA32_P
|
||||
set_property -dict {PACKAGE_PIN Y27 IOSTANDARD LVCMOS25} [get_ports data[22]] ; ## H38 FMC_LPC_LA32_N
|
||||
set_property -dict {PACKAGE_PIN AC28 IOSTANDARD LVCMOS25} [get_ports data[23]] ; ## G02 FMC_LPC_CLK1_M2C_P
|
||||
set_property -dict {PACKAGE_PIN AD28 IOSTANDARD LVCMOS25} [get_ports data[24]] ; ## G03 FMC_LPC_CLK1_M2C_N
|
||||
set_property -dict {PACKAGE_PIN AG12 IOSTANDARD LVCMOS25} [get_ports data[25]] ; ## G09 FMC_LPC_LA03_P
|
||||
set_property -dict {PACKAGE_PIN AH12 IOSTANDARD LVCMOS25} [get_ports data[26]] ; ## G10 FMC_LPC_LA03_N
|
||||
set_property -dict {PACKAGE_PIN AD14 IOSTANDARD LVCMOS25} [get_ports data[27]] ; ## G12 FMC_LPC_LA08_P
|
||||
set_property -dict {PACKAGE_PIN AD13 IOSTANDARD LVCMOS25} [get_ports data[28]] ; ## G13 FMC_LPC_LA08_N
|
||||
set_property -dict {PACKAGE_PIN AD16 IOSTANDARD LVCMOS25} [get_ports data[29]] ; ## G15 FMC_LPC_LA12_P
|
||||
set_property -dict {PACKAGE_PIN AD15 IOSTANDARD LVCMOS25} [get_ports data[30]] ; ## G16 FMC_LPC_LA12_N
|
||||
set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports data[31]] ; ## G18 FMC_LPC_LA16_P
|
||||
|
||||
set_property -dict {PACKAGE_PIN AE13 IOSTANDARD LVCMOS25} [get_ports pclk] ; ## G06 FMC_LPC_LA00_CC_P
|
||||
|
||||
set_property -dict {PACKAGE_PIN AA30 IOSTANDARD LVCMOS25} [get_ports addr[0]] ; ## G37 FMC_LPC_LA33_N
|
||||
set_property -dict {PACKAGE_PIN Y30 IOSTANDARD LVCMOS25} [get_ports addr[1]] ; ## G36 FMC_LPC_LA33_P
|
||||
#set_property -dict {PACKAGE_PIN AD29 IOSTANDARD LVCMOS25} [get_ports addr[2]] ; ## G34 FMC_LPC_LA31_N
|
||||
#set_property -dict {PACKAGE_PIN AC29 IOSTANDARD LVCMOS25} [get_ports addr[3]] ; ## G33 FMC_LPC_LA31_P
|
||||
#set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVCMOS33} [get_ports addr[4]] ; ## G31 FMC_LPC_LA29_N
|
||||
|
||||
set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports slcs_n] ; ## G19 FMC_LPC_LA16_N
|
||||
set_property -dict {PACKAGE_PIN AG26 IOSTANDARD LVCMOS25} [get_ports slwr_n] ; ## G21 FMC_LPC_LA20_P
|
||||
set_property -dict {PACKAGE_PIN AG27 IOSTANDARD LVCMOS25} [get_ports sloe_n] ; ## G22 FMC_LPC_LA20_N
|
||||
set_property -dict {PACKAGE_PIN AK27 IOSTANDARD LVCMOS25} [get_ports slrd_n] ; ## G24 FMC_LPC_LA22_P
|
||||
set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS25} [get_ports pktend_n] ; ## G30 FMC_LPC_LA29_P
|
||||
|
||||
set_property -dict {PACKAGE_PIN AJ21 IOSTANDARD LVCMOS25} [get_ports usb_fx3_uart_tx] ; ## PMOD1_0, Connector J58 pin 1, 3.3V through level shifter
|
||||
set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS25} [get_ports usb_fx3_uart_rx] ; ## PMOD1_4, Connector J58 pin 2, 3.3V through level shifter
|
||||
|
||||
set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVCMOS25} [get_ports fifo_rdy[0]] ; ## G25 FMC_LPC_LA22_N
|
||||
set_property -dict {PACKAGE_PIN AF29 IOSTANDARD LVCMOS25} [get_ports fifo_rdy[1]] ; ## G27 FMC_LPC_LA25_P
|
||||
set_property -dict {PACKAGE_PIN AG29 IOSTANDARD LVCMOS25} [get_ports fifo_rdy[2]] ; ## G28 FMC_LPC_LA25_N
|
||||
set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVCMOS25} [get_ports fifo_rdy[3]] ; ## G31 FMC_LPC_LA29_N
|
||||
#set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports fifo_rdy[4]] ; ## G18 FMC_LPC_LA16_P
|
||||
#set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports fifo_rdy[5]] ; ## G18 FMC_LPC_LA16_P
|
||||
#set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports fifo_rdy[6]] ; ## G18 FMC_LPC_LA16_P
|
||||
#set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports fifo_rdy[7]] ; ## G18 FMC_LPC_LA16_P
|
||||
#set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports fifo_rdy[8]] ; ## G18 FMC_LPC_LA16_P
|
||||
#set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports fifo_rdy[9]] ; ## G18 FMC_LPC_LA16_P
|
||||
#set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS33} [get_ports fifo_rdy[10]] ; ## G18 FMC_LPC_LA16_P
|
||||
set_property -dict {PACKAGE_PIN AE16 IOSTANDARD LVCMOS25} [get_ports pmode[0]] ; ## D11 FMC_LPC_LA05_P
|
||||
set_property -dict {PACKAGE_PIN AE15 IOSTANDARD LVCMOS25} [get_ports pmode[1]] ; ## D12 FMC_LPC_LA05_N
|
|
@ -1,14 +0,0 @@
|
|||
|
||||
source ../../scripts/adi_env.tcl
|
||||
source $ad_hdl_dir/projects/scripts/adi_project.tcl
|
||||
source $ad_hdl_dir/projects/scripts/adi_board.tcl
|
||||
|
||||
adi_project_xilinx usb_fx3_zc706
|
||||
adi_project_files usb_fx3_zc706 [list \
|
||||
"system_top.v" \
|
||||
"system_constr.xdc" \
|
||||
"$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc" \
|
||||
"$ad_hdl_dir/library/xilinx/common/ad_iobuf.v"]
|
||||
|
||||
adi_project_run usb_fx3_zc706
|
||||
|
|
@ -1,173 +0,0 @@
|
|||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
// Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
|
||||
//
|
||||
// In this HDL repository, there are many different and unique modules, consisting
|
||||
// of various HDL (Verilog or VHDL) components. The individual modules are
|
||||
// developed independently, and may be accompanied by separate and unique license
|
||||
// terms.
|
||||
//
|
||||
// The user should read each of these license terms, and understand the
|
||||
// freedoms and responsabilities that he or she has by using this source/core.
|
||||
//
|
||||
// This core is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
|
||||
// A PARTICULAR PURPOSE.
|
||||
//
|
||||
// Redistribution and use of source or resulting binaries, with or without modification
|
||||
// of this file, are permitted under one of the following two license terms:
|
||||
//
|
||||
// 1. The GNU General Public License version 2 as published by the
|
||||
// Free Software Foundation, which can be found in the top level directory
|
||||
// of this repository (LICENSE_GPL2), and also online at:
|
||||
// <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
|
||||
//
|
||||
// OR
|
||||
//
|
||||
// 2. An ADI specific BSD license, which can be found in the top level directory
|
||||
// of this repository (LICENSE_ADIBSD), and also on-line at:
|
||||
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
|
||||
// This will allow to generate bit files and not release the source code,
|
||||
// as long as it attaches to an ADI device.
|
||||
//
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
|
||||
`timescale 1ns/100ps
|
||||
|
||||
module system_top (
|
||||
|
||||
inout [14:0] ddr_addr,
|
||||
inout [ 2:0] ddr_ba,
|
||||
inout ddr_cas_n,
|
||||
inout ddr_ck_n,
|
||||
inout ddr_ck_p,
|
||||
inout ddr_cke,
|
||||
inout ddr_cs_n,
|
||||
inout [ 3:0] ddr_dm,
|
||||
inout [31:0] ddr_dq,
|
||||
inout [ 3:0] ddr_dqs_n,
|
||||
inout [ 3:0] ddr_dqs_p,
|
||||
inout ddr_odt,
|
||||
inout ddr_ras_n,
|
||||
inout ddr_reset_n,
|
||||
inout ddr_we_n,
|
||||
|
||||
inout fixed_io_ddr_vrn,
|
||||
inout fixed_io_ddr_vrp,
|
||||
inout [53:0] fixed_io_mio,
|
||||
inout fixed_io_ps_clk,
|
||||
inout fixed_io_ps_porb,
|
||||
inout fixed_io_ps_srstb,
|
||||
|
||||
inout [14:0] gpio_bd,
|
||||
|
||||
input usb_fx3_uart_tx,
|
||||
output usb_fx3_uart_rx,
|
||||
|
||||
input [ 3:0] fifo_rdy,
|
||||
|
||||
inout [31:0] data,
|
||||
output [1:0] addr,
|
||||
output pclk,
|
||||
output slcs_n,
|
||||
output slrd_n,
|
||||
output sloe_n,
|
||||
output slwr_n,
|
||||
output pktend_n,
|
||||
|
||||
output [ 1:0] pmode,
|
||||
|
||||
output hdmi_out_clk,
|
||||
output hdmi_vsync,
|
||||
output hdmi_hsync,
|
||||
output hdmi_data_e,
|
||||
output [23:0] hdmi_data,
|
||||
|
||||
output spdif,
|
||||
|
||||
inout iic_scl,
|
||||
inout iic_sda
|
||||
|
||||
);
|
||||
|
||||
// internal signals
|
||||
|
||||
wire [63:0] gpio_i;
|
||||
wire [63:0] gpio_o;
|
||||
wire [63:0] gpio_t;
|
||||
|
||||
|
||||
assign pmode = 2'b11;
|
||||
|
||||
// instantiations
|
||||
|
||||
ad_iobuf #(
|
||||
.DATA_WIDTH(15)
|
||||
) i_gpio_bd (
|
||||
.dio_t(gpio_t[14:0]),
|
||||
.dio_i(gpio_o[14:0]),
|
||||
.dio_o(gpio_i[14:0]),
|
||||
.dio_p(gpio_bd));
|
||||
|
||||
system_wrapper i_system_wrapper (
|
||||
.ddr_addr (ddr_addr),
|
||||
.ddr_ba (ddr_ba),
|
||||
.ddr_cas_n (ddr_cas_n),
|
||||
.ddr_ck_n (ddr_ck_n),
|
||||
.ddr_ck_p (ddr_ck_p),
|
||||
.ddr_cke (ddr_cke),
|
||||
.ddr_cs_n (ddr_cs_n),
|
||||
.ddr_dm (ddr_dm),
|
||||
.ddr_dq (ddr_dq),
|
||||
.ddr_dqs_n (ddr_dqs_n),
|
||||
.ddr_dqs_p (ddr_dqs_p),
|
||||
.ddr_odt (ddr_odt),
|
||||
.ddr_ras_n (ddr_ras_n),
|
||||
.ddr_reset_n (ddr_reset_n),
|
||||
.ddr_we_n (ddr_we_n),
|
||||
.fixed_io_ddr_vrn (fixed_io_ddr_vrn),
|
||||
.fixed_io_ddr_vrp (fixed_io_ddr_vrp),
|
||||
.fixed_io_mio (fixed_io_mio),
|
||||
.fixed_io_ps_clk (fixed_io_ps_clk),
|
||||
.fixed_io_ps_porb (fixed_io_ps_porb),
|
||||
.fixed_io_ps_srstb (fixed_io_ps_srstb),
|
||||
.gpio_i (gpio_i),
|
||||
.gpio_o (gpio_o),
|
||||
.gpio_t (gpio_t),
|
||||
.hdmi_data (hdmi_data),
|
||||
.hdmi_data_e (hdmi_data_e),
|
||||
.hdmi_hsync (hdmi_hsync),
|
||||
.hdmi_out_clk (hdmi_out_clk),
|
||||
.hdmi_vsync (hdmi_vsync),
|
||||
.iic_main_scl_io (iic_scl),
|
||||
.iic_main_sda_io (iic_sda),
|
||||
.usb_fx3_uart_tx(usb_fx3_uart_tx),
|
||||
.usb_fx3_uart_rx(usb_fx3_uart_rx),
|
||||
.dma_rdy(dma_rdy),
|
||||
.dma_wmk(dma_wmk),
|
||||
.fifo_rdy(fifo_rdy),
|
||||
.pclk(pclk),
|
||||
.data(data),
|
||||
.addr(addr),
|
||||
.slcs_n(slcs_n),
|
||||
.slrd_n(slrd_n),
|
||||
.sloe_n(sloe_n),
|
||||
.slwr_n(slwr_n),
|
||||
// .epswitch_n(epswitch_n),
|
||||
.pktend_n(pktend_n),
|
||||
.ps_intr_00 (1'b0),
|
||||
.ps_intr_01 (1'b0),
|
||||
.ps_intr_02 (1'b0),
|
||||
.ps_intr_03 (1'b0),
|
||||
.ps_intr_04 (1'b0),
|
||||
.ps_intr_05 (1'b0),
|
||||
.ps_intr_06 (1'b0),
|
||||
.ps_intr_07 (1'b0),
|
||||
.ps_intr_08 (1'b0),
|
||||
.spdif (spdif));
|
||||
|
||||
endmodule
|
||||
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
Loading…
Reference in New Issue