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fmcomms5: Fixed the wornings created by TDD missing connections to axi_ad9361 core

main
AndreiGrozav 2016-12-07 21:42:21 +02:00
parent 8eaae98728
commit 3bc9df4c51
5 changed files with 70 additions and 26 deletions
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20
projects/fmcomms5/common/fmcomms5_bd.tcl
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@ -16,6 +16,11 @@ create_bd_port -dir O tx_frame_out_0_n
create_bd_port -dir O -from 5 -to 0 tx_data_out_0_p
create_bd_port -dir O -from 5 -to 0 tx_data_out_0_n
create_bd_port -dir O enable_0
create_bd_port -dir O txnrx_0
create_bd_port -dir I up_enable_0
create_bd_port -dir I up_txnrx_0
# slave
create_bd_port -dir I rx_clk_in_1_p
@ -31,6 +36,11 @@ create_bd_port -dir O tx_frame_out_1_n
create_bd_port -dir O -from 5 -to 0 tx_data_out_1_p
create_bd_port -dir O -from 5 -to 0 tx_data_out_1_n
create_bd_port -dir O enable_1
create_bd_port -dir O txnrx_1
create_bd_port -dir I up_enable_1
create_bd_port -dir I up_txnrx_1
create_bd_port -dir O sys_100m_resetn
# instances
@ -224,6 +234,16 @@ ad_connect util_upack_dac/dac_data axi_ad9361_dac_dma/fifo_rd_dout
ad_connect axi_ad9361_0/adc_dovf axi_ad9361_adc_dma/fifo_wr_overflow
ad_connect axi_ad9361_0/dac_dunf axi_ad9361_dac_dma/fifo_rd_underflow
ad_connect axi_ad9361_0/up_enable up_enable_0
ad_connect axi_ad9361_0/up_txnrx up_txnrx_0
ad_connect axi_ad9361_1/up_enable up_enable_1
ad_connect axi_ad9361_1/up_txnrx up_txnrx_1
ad_connect axi_ad9361_0/enable enable_0
ad_connect axi_ad9361_0/txnrx txnrx_0
ad_connect axi_ad9361_1/enable enable_1
ad_connect axi_ad9361_1/txnrx txnrx_1
# address map
ad_cpu_interconnect 0x79020000 axi_ad9361_0

8
projects/fmcomms5/zc702/system_constr.xdc
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@ -54,8 +54,8 @@ set_property -dict {PACKAGE_PIN A22 IOSTANDARD LVCMOS25} [get_ports gpio_ct
set_property -dict {PACKAGE_PIN C15 IOSTANDARD LVCMOS25} [get_ports gpio_en_agc_0] ; ## G27 FMC1_LPC_LA25_P
set_property -dict {PACKAGE_PIN D20 IOSTANDARD LVCMOS25} [get_ports mcs_sync] ; ## C22 FMC1_LPC_LA18_CC_P
set_property -dict {PACKAGE_PIN C20 IOSTANDARD LVCMOS25} [get_ports gpio_resetb_0] ; ## C23 FMC1_LPC_LA18_CC_N
set_property -dict {PACKAGE_PIN N15 IOSTANDARD LVCMOS25} [get_ports gpio_enable_0] ; ## G18 FMC1_LPC_LA16_P
set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS25} [get_ports gpio_txnrx_0] ; ## G19 FMC1_LPC_LA16_N
set_property -dict {PACKAGE_PIN N15 IOSTANDARD LVCMOS25} [get_ports enable_0] ; ## G18 FMC1_LPC_LA16_P
set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS25} [get_ports txnrx_0] ; ## G19 FMC1_LPC_LA16_N
set_property -dict {PACKAGE_PIN C17 IOSTANDARD LVCMOS25} [get_ports gpio_debug_1_0] ; ## C26 FMC1_LPC_LA27_P
set_property -dict {PACKAGE_PIN C18 IOSTANDARD LVCMOS25} [get_ports gpio_debug_2_0] ; ## C27 FMC1_LPC_LA27_N
set_property -dict {PACKAGE_PIN F18 IOSTANDARD LVCMOS25} [get_ports gpio_calsw_1_0] ; ## D26 FMC1_LPC_LA26_P
@ -121,8 +121,8 @@ set_property -dict {PACKAGE_PIN U6 IOSTANDARD LVCMOS25} [get_ports gpio_ct
set_property -dict {PACKAGE_PIN U5 IOSTANDARD LVCMOS25} [get_ports gpio_ctl_1[3]] ; ## H29 FMC2_LPC_LA24_N
set_property -dict {PACKAGE_PIN AA12 IOSTANDARD LVCMOS25} [get_ports gpio_en_agc_1] ; ## G27 FMC2_LPC_LA25_P
set_property -dict {PACKAGE_PIN AA11 IOSTANDARD LVCMOS25} [get_ports gpio_resetb_1] ; ## G30 FMC2_LPC_LA29_P
set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVCMOS25} [get_ports gpio_enable_1] ; ## G18 FMC2_LPC_LA16_P
set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVCMOS25} [get_ports gpio_txnrx_1] ; ## G19 FMC2_LPC_LA16_N
set_property -dict {PACKAGE_PIN AB14 IOSTANDARD LVCMOS25} [get_ports enable_1] ; ## G18 FMC2_LPC_LA16_P
set_property -dict {PACKAGE_PIN AB15 IOSTANDARD LVCMOS25} [get_ports txnrx_1] ; ## G19 FMC2_LPC_LA16_N
set_property -dict {PACKAGE_PIN AB2 IOSTANDARD LVCMOS25} [get_ports gpio_debug_3_1] ; ## C26 FMC2_LPC_LA27_P
set_property -dict {PACKAGE_PIN AB1 IOSTANDARD LVCMOS25} [get_ports gpio_debug_4_1] ; ## C27 FMC2_LPC_LA27_N
set_property -dict {PACKAGE_PIN U12 IOSTANDARD LVCMOS25} [get_ports gpio_calsw_3_1] ; ## D26 FMC2_LPC_LA26_P

30
projects/fmcomms5/zc702/system_top.v
View File

@ -94,8 +94,8 @@ module system_top (
gpio_en_agc_0,
mcs_sync,
gpio_resetb_0,
gpio_enable_0,
gpio_txnrx_0,
enable_0,
txnrx_0,
gpio_debug_1_0,
gpio_debug_2_0,
gpio_calsw_1_0,
@ -119,8 +119,8 @@ module system_top (
gpio_ctl_1,
gpio_en_agc_1,
gpio_resetb_1,
gpio_enable_1,
gpio_txnrx_1,
enable_1,
txnrx_1,
gpio_debug_3_1,
gpio_debug_4_1,
gpio_calsw_3_1,
@ -189,8 +189,8 @@ module system_top (
inout gpio_en_agc_0;
output mcs_sync;
inout gpio_resetb_0;
inout gpio_enable_0;
inout gpio_txnrx_0;
output enable_0;
output txnrx_0;
inout gpio_debug_1_0;
inout gpio_debug_2_0;
inout gpio_calsw_1_0;
@ -214,8 +214,8 @@ module system_top (
inout [ 3:0] gpio_ctl_1;
inout gpio_en_agc_1;
inout gpio_resetb_1;
inout gpio_enable_1;
inout gpio_txnrx_1;
output enable_1;
output txnrx_1;
inout gpio_debug_3_1;
inout gpio_debug_4_1;
inout gpio_calsw_3_1;
@ -254,6 +254,10 @@ module system_top (
wire spi1_clk;
wire spi1_mosi;
wire spi1_miso;
wire txnrx_0;
wire enable_0;
wire txnrx_1;
wire enable_1;
// multi-chip synchronization
@ -404,7 +408,15 @@ module system_top (
.tx_frame_out_0_n (tx_frame_out_0_n),
.tx_frame_out_0_p (tx_frame_out_0_p),
.tx_frame_out_1_n (tx_frame_out_1_n),
.tx_frame_out_1_p (tx_frame_out_1_p));
.tx_frame_out_1_p (tx_frame_out_1_p),
.txnrx_0 (txnrx_0),
.enable_0 (enable_0),
.up_enable_0 (gpio_enable_0),
.up_txnrx_0 (gpio_txnrx_0),
.txnrx_1 (txnrx_1),
.enable_1 (enable_1),
.up_enable_1 (gpio_enable_1),
.up_txnrx_1 (gpio_txnrx_1));
endmodule

8
projects/fmcomms5/zc706/system_constr.xdc
View File

@ -54,8 +54,8 @@ set_property -dict {PACKAGE_PIN U30 IOSTANDARD LVCMOS25} [get_ports gpio_ct
set_property -dict {PACKAGE_PIN T29 IOSTANDARD LVCMOS25} [get_ports gpio_en_agc_0] ; ## G27 FMC_HPC_LA25_P
set_property -dict {PACKAGE_PIN W25 IOSTANDARD LVCMOS25} [get_ports mcs_sync] ; ## C22 FMC_HPC_LA18_CC_P
set_property -dict {PACKAGE_PIN W26 IOSTANDARD LVCMOS25} [get_ports gpio_resetb_0] ; ## C23 FMC_HPC_LA18_CC_N
set_property -dict {PACKAGE_PIN AA24 IOSTANDARD LVCMOS25} [get_ports gpio_enable_0] ; ## G18 FMC_HPC_LA16_P
set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS25} [get_ports gpio_txnrx_0] ; ## G19 FMC_HPC_LA16_N
set_property -dict {PACKAGE_PIN AA24 IOSTANDARD LVCMOS25} [get_ports enable_0] ; ## G18 FMC_HPC_LA16_P
set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS25} [get_ports txnrx_0] ; ## G19 FMC_HPC_LA16_N
set_property -dict {PACKAGE_PIN V28 IOSTANDARD LVCMOS25} [get_ports gpio_debug_1_0] ; ## C26 FMC_HPC_LA27_P
set_property -dict {PACKAGE_PIN V29 IOSTANDARD LVCMOS25} [get_ports gpio_debug_2_0] ; ## C27 FMC_HPC_LA27_N
set_property -dict {PACKAGE_PIN R28 IOSTANDARD LVCMOS25} [get_ports gpio_calsw_1_0] ; ## D26 FMC_HPC_LA26_P
@ -121,8 +121,8 @@ set_property -dict {PACKAGE_PIN AF30 IOSTANDARD LVCMOS25} [get_ports gpio_ct
set_property -dict {PACKAGE_PIN AG30 IOSTANDARD LVCMOS25} [get_ports gpio_ctl_1[3]] ; ## H29 FMC_LPC_LA24_N
set_property -dict {PACKAGE_PIN AF29 IOSTANDARD LVCMOS25} [get_ports gpio_en_agc_1] ; ## G27 FMC_LPC_LA25_P
set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVCMOS25} [get_ports gpio_resetb_1] ; ## G30 FMC_LPC_29_P
set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports gpio_enable_1] ; ## G18 FMC_LPC_LA16_P
set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports gpio_txnrx_1] ; ## G19 FMC_LPC_LA16_N
set_property -dict {PACKAGE_PIN AE18 IOSTANDARD LVCMOS25} [get_ports enable_1] ; ## G18 FMC_LPC_LA16_P
set_property -dict {PACKAGE_PIN AE17 IOSTANDARD LVCMOS25} [get_ports txnrx_1] ; ## G19 FMC_LPC_LA16_N
set_property -dict {PACKAGE_PIN AJ28 IOSTANDARD LVCMOS25} [get_ports gpio_debug_3_1] ; ## C26 FMC_LPC_LA27_P
set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVCMOS25} [get_ports gpio_debug_4_1] ; ## C27 FMC_LPC_LA27_N
set_property -dict {PACKAGE_PIN AJ30 IOSTANDARD LVCMOS25} [get_ports gpio_calsw_3_1] ; ## D26 FMC_LPC_LA26_P

30
projects/fmcomms5/zc706/system_top.v
View File

@ -94,8 +94,8 @@ module system_top (
gpio_en_agc_0,
mcs_sync,
gpio_resetb_0,
gpio_enable_0,
gpio_txnrx_0,
enable_0,
txnrx_0,
gpio_debug_1_0,
gpio_debug_2_0,
gpio_calsw_1_0,
@ -119,8 +119,8 @@ module system_top (
gpio_ctl_1,
gpio_en_agc_1,
gpio_resetb_1,
gpio_enable_1,
gpio_txnrx_1,
enable_1,
txnrx_1,
gpio_debug_3_1,
gpio_debug_4_1,
gpio_calsw_3_1,
@ -189,8 +189,8 @@ module system_top (
inout gpio_en_agc_0;
output mcs_sync;
inout gpio_resetb_0;
inout gpio_enable_0;
inout gpio_txnrx_0;
output enable_0;
output txnrx_0;
inout gpio_debug_1_0;
inout gpio_debug_2_0;
inout gpio_calsw_1_0;
@ -214,8 +214,8 @@ module system_top (
inout [ 3:0] gpio_ctl_1;
inout gpio_en_agc_1;
inout gpio_resetb_1;
inout gpio_enable_1;
inout gpio_txnrx_1;
output enable_1;
output txnrx_1;
inout gpio_debug_3_1;
inout gpio_debug_4_1;
inout gpio_calsw_3_1;
@ -255,6 +255,10 @@ module system_top (
wire spi1_clk;
wire spi1_mosi;
wire spi1_miso;
wire txnrx_0;
wire enable_0;
wire txnrx_1;
wire enable_1;
// multi-chip synchronization
@ -406,7 +410,15 @@ module system_top (
.tx_frame_out_0_n (tx_frame_out_0_n),
.tx_frame_out_0_p (tx_frame_out_0_p),
.tx_frame_out_1_n (tx_frame_out_1_n),
.tx_frame_out_1_p (tx_frame_out_1_p));
.tx_frame_out_1_p (tx_frame_out_1_p),
.txnrx_0 (txnrx_0),
.enable_0 (enable_0),
.up_enable_0 (gpio_enable_0),
.up_txnrx_0 (gpio_txnrx_0),
.txnrx_1 (txnrx_1),
.enable_1 (enable_1),
.up_enable_1 (gpio_enable_1),
.up_txnrx_1 (gpio_txnrx_1));
endmodule