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axi_hdmi_rx: Updated constraints

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Adrian Costina 2015-04-30 12:04:15 +03:00
parent 1df48a2e6e
commit 392ba31a07
3 changed files with 47 additions and 4 deletions
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1
library/axi_hdmi_rx/Makefile
View File

@ -21,6 +21,7 @@ M_DEPS += ../common/up_xfer_cntrl.v
M_DEPS += ../common/up_hdmi_rx.v
M_DEPS += axi_hdmi_rx.v
M_DEPS += axi_hdmi_rx_es.v
M_DEPS += axi_hdmi_rx_constr.xdc
M_DEPS += axi_hdmi_rx_core.v
M_VIVADO := vivado -mode batch -source

49
library/axi_hdmi_rx/axi_hdmi_rx_constr.xdc
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@ -1,5 +1,46 @@
set up_clk [get_clocks -of_objects [get_ports s_axi_aclk]]
set hdmi_rx_clk [get_clocks -of_objects [get_ports hdmi_rx_clk]]
set_property ASYNC_REG TRUE \
[get_cells -hier *toggle_m1_reg*] \
[get_cells -hier *toggle_m2_reg*] \
[get_cells -hier *state_m1_reg*] \
[get_cells -hier *state_m2_reg*]
set_false_path \
-from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier d_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop}]
set_false_path \
-from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier up_xfer_state_m1_reg* -filter {primitive_subgroup == flop}]
set_max_delay -datapath_only \
-from [get_cells -hier up_xfer_data_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier d_data_cntrl_reg* -filter {primitive_subgroup == flop}] \
[get_property PERIOD $hdmi_rx_clk]
set_false_path \
-from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier up_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop}]
set_false_path \
-from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier d_xfer_state_m1_reg* -filter {primitive_subgroup == flop}]
set_max_delay -datapath_only \
-from [get_cells -hier d_xfer_data_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier up_data_status_reg* -filter {primitive_subgroup == flop}] \
[get_property PERIOD $up_clk]
set_false_path \
-from [get_cells -hier up_count_toggle_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier d_count_toggle_m1_reg* -filter {primitive_subgroup == flop}]
set_false_path \
-from [get_cells -hier d_count_toggle_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier up_count_toggle_m1_reg* -filter {primitive_subgroup == flop}]
set_max_delay -datapath_only \
-from [get_cells -hier d_count_hold_reg* -filter {primitive_subgroup == flop}] \
-to [get_cells -hier up_d_count_reg* -filter {primitive_subgroup == flop}] \
[get_property PERIOD $up_clk]
set_false_path \
-to [get_pins -hier */PRE -filter {NAME =~ *i_*rst_reg*}]
set_false_path -from [get_cells *d_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}] \
-to [get_cells *up_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}]
set_false_path -from [get_cells *up_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}] \
-to [get_cells *d_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}]

1
library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl
View File

@ -18,6 +18,7 @@ adi_ip_files axi_hdmi_rx [list \
"$ad_hdl_dir/library/common/up_hdmi_rx.v" \
"axi_hdmi_rx.v" \
"axi_hdmi_rx_es.v" \
"axi_hdmi_rx_constr.xdc" \
"axi_hdmi_rx_core.v" ]
adi_ip_properties axi_hdmi_rx