From 392ba31a07f7a8317e15b8ccd79d8d6a36c7da71 Mon Sep 17 00:00:00 2001
From: Adrian Costina <adrian.costina@analog.com>
Date: Thu, 30 Apr 2015 12:04:15 +0300
Subject: [PATCH] axi_hdmi_rx: Updated constraints

---
 library/axi_hdmi_rx/Makefile               |  1 +
 library/axi_hdmi_rx/axi_hdmi_rx_constr.xdc | 49 ++++++++++++++++++++--
 library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl     |  1 +
 3 files changed, 47 insertions(+), 4 deletions(-)

diff --git a/library/axi_hdmi_rx/Makefile b/library/axi_hdmi_rx/Makefile
index e6f9813cd..519cacca7 100644
--- a/library/axi_hdmi_rx/Makefile
+++ b/library/axi_hdmi_rx/Makefile
@@ -21,6 +21,7 @@ M_DEPS += ../common/up_xfer_cntrl.v
 M_DEPS += ../common/up_hdmi_rx.v
 M_DEPS += axi_hdmi_rx.v
 M_DEPS += axi_hdmi_rx_es.v
+M_DEPS += axi_hdmi_rx_constr.xdc
 M_DEPS += axi_hdmi_rx_core.v
 
 M_VIVADO := vivado -mode batch -source
diff --git a/library/axi_hdmi_rx/axi_hdmi_rx_constr.xdc b/library/axi_hdmi_rx/axi_hdmi_rx_constr.xdc
index a094eff31..91b4757e9 100644
--- a/library/axi_hdmi_rx/axi_hdmi_rx_constr.xdc
+++ b/library/axi_hdmi_rx/axi_hdmi_rx_constr.xdc
@@ -1,5 +1,46 @@
+set up_clk [get_clocks -of_objects [get_ports s_axi_aclk]]
+set hdmi_rx_clk [get_clocks -of_objects [get_ports hdmi_rx_clk]]
+
+set_property ASYNC_REG TRUE \
+  [get_cells -hier *toggle_m1_reg*] \
+  [get_cells -hier *toggle_m2_reg*] \
+  [get_cells -hier *state_m1_reg*] \
+  [get_cells -hier *state_m2_reg*]
+
+set_false_path \
+  -from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier d_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop}]
+set_false_path \
+  -from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier up_xfer_state_m1_reg* -filter {primitive_subgroup == flop}]
+set_max_delay  -datapath_only \
+  -from [get_cells -hier up_xfer_data_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier d_data_cntrl_reg* -filter {primitive_subgroup == flop}] \
+  [get_property PERIOD $hdmi_rx_clk]
+
+set_false_path \
+  -from [get_cells -hier d_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier up_xfer_toggle_m1_reg* -filter {primitive_subgroup == flop}]
+set_false_path \
+  -from [get_cells -hier up_xfer_toggle_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier d_xfer_state_m1_reg* -filter {primitive_subgroup == flop}]
+set_max_delay -datapath_only \
+  -from [get_cells -hier d_xfer_data_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier up_data_status_reg* -filter {primitive_subgroup == flop}] \
+  [get_property PERIOD $up_clk]
+
+set_false_path \
+  -from [get_cells -hier up_count_toggle_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier d_count_toggle_m1_reg* -filter {primitive_subgroup == flop}]
+set_false_path \
+  -from [get_cells -hier d_count_toggle_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier up_count_toggle_m1_reg* -filter {primitive_subgroup == flop}]
+set_max_delay  -datapath_only \
+  -from [get_cells -hier d_count_hold_reg* -filter {primitive_subgroup == flop}] \
+  -to [get_cells -hier up_d_count_reg* -filter {primitive_subgroup == flop}] \
+  [get_property PERIOD $up_clk]
+
+set_false_path \
+  -to [get_pins -hier */PRE -filter {NAME =~ *i_*rst_reg*}]
+
 
-set_false_path -from [get_cells *d_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}] \
-  -to [get_cells *up_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}]
-set_false_path -from [get_cells *up_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}] \
-  -to [get_cells *d_xfer_* -hierarchical -filter {PRIMITIVE_SUBGROUP == flop}]
diff --git a/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl b/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl
index 6ff13fb6a..3a310e897 100644
--- a/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl
+++ b/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl
@@ -18,6 +18,7 @@ adi_ip_files axi_hdmi_rx [list \
   "$ad_hdl_dir/library/common/up_hdmi_rx.v" \
   "axi_hdmi_rx.v" \
   "axi_hdmi_rx_es.v" \
+  "axi_hdmi_rx_constr.xdc" \
   "axi_hdmi_rx_core.v" ]
 
 adi_ip_properties axi_hdmi_rx