Testbenches: Unify and optimize HDL testbenches

Create a common 'run_tb.sh' script to be called by every testbench.
Unify file and testbenches names.
Fix util_pack/cpack_tb.
Add parameters '-batch' and '-gui' for modelsim and xsim simulators (default is gui)
Add ascript for that generates output in xml format (used by CI tools).
main
stefan.raus 2021-04-19 13:10:54 +01:00 committed by SRaus
parent c235e5e583
commit 37238916df
43 changed files with 112 additions and 144 deletions

View File

@ -16,4 +16,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
SOURCE+=" ../../common/ad_mem_asym.v" SOURCE+=" ../../common/ad_mem_asym.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -35,7 +35,7 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module dmac_dma_read_shutdown_tb; module dma_read_shutdown_tb;
parameter VCD_FILE = {`__FILE__,"cd"}; parameter VCD_FILE = {`__FILE__,"cd"};
`include "tb_base.v" `include "tb_base.v"

View File

@ -15,4 +15,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
SOURCE+=" ../../common/ad_mem_asym.v" SOURCE+=" ../../common/ad_mem_asym.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -35,7 +35,7 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module dmac_dma_read_tb; module dma_read_tb;
parameter VCD_FILE = {`__FILE__,"cd"}; parameter VCD_FILE = {`__FILE__,"cd"};
parameter WIDTH_DEST = 32; parameter WIDTH_DEST = 32;
parameter WIDTH_SRC = 32; parameter WIDTH_SRC = 32;

View File

@ -16,4 +16,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
SOURCE+=" ../../common/ad_mem_asym.v" SOURCE+=" ../../common/ad_mem_asym.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -35,7 +35,7 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module dmac_dma_write_shutdown_tb; module dma_write_shutdown_tb;
parameter VCD_FILE = {`__FILE__,"cd"}; parameter VCD_FILE = {`__FILE__,"cd"};
`include "tb_base.v" `include "tb_base.v"

View File

@ -15,4 +15,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
SOURCE+=" ../../common/ad_mem_asym.v" SOURCE+=" ../../common/ad_mem_asym.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -35,7 +35,7 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module dmac_dma_write_tb; module dma_write_tb;
parameter VCD_FILE = {`__FILE__,"cd"}; parameter VCD_FILE = {`__FILE__,"cd"};
parameter WIDTH_DEST = 32; parameter WIDTH_DEST = 32;
parameter WIDTH_SRC = 32; parameter WIDTH_SRC = 32;

View File

@ -4,7 +4,7 @@ SOURCE="regmap_tb.v"
SOURCE+=" ../axi_dmac_regmap.v ../axi_dmac_regmap_request.v" SOURCE+=" ../axi_dmac_regmap.v ../axi_dmac_regmap_request.v"
SOURCE+=" ../../common/up_axi.v" SOURCE+=" ../../common/up_axi.v"
SOURCE+=" ../../util_axis_fifo/util_axis_fifo.v" SOURCE+=" ../../util_axis_fifo/util_axis_fifo.v"
SOURCE+=" ../../util_axis_fifo/address_sync.v" SOURCE+=" ../../util_axis_fifo/util_axis_fifo_address_generator.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -35,7 +35,7 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module dmac_regmap_tb; module regmap_tb;
parameter VCD_FILE = {`__FILE__,"cd"}; parameter VCD_FILE = {`__FILE__,"cd"};
`define TIMEOUT 1000000 `define TIMEOUT 1000000

View File

@ -5,4 +5,4 @@ SOURCE+=" ../axi_dmac_reset_manager.v"
SOURCE+=" ../../util_cdc/sync_bits.v" SOURCE+=" ../../util_cdc/sync_bits.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -35,7 +35,7 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module dmac_reset_manager_tb; module reset_manager_tb;
parameter VCD_FILE = {`__FILE__,"cd"}; parameter VCD_FILE = {`__FILE__,"cd"};
`define TIMEOUT 1000000 `define TIMEOUT 1000000

View File

@ -1,24 +0,0 @@
NAME=`basename $0`
case "$SIMULATOR" in
modelsim)
# ModelSim flow
vlib work
vlog ${SOURCE} || exit 1
vsim "dmac_"${NAME} -do "add log /* -r; run -a" -gui || exit 1
;;
xsim)
# xsim flow
xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE}
xelab -log ${NAME}_xelab.log -debug all dmac_${NAME}
xsim work.dmac_${NAME} -R
;;
*)
#Icarus flow is the default
mkdir -p run
mkdir -p vcd
iverilog -o run/run_${NAME} -I.. ${SOURCE} $1 || exit 1
cd vcd
../run/run_${NAME}
;;
esac

View File

@ -0,0 +1,39 @@
#!/bin/bash
# Depending on simulator, search for errors or 'SUCCESS' keyword in specific log
if [[ "$SIMULATOR" == "modelsim" ]]; then
ERRS=`grep -i -e '# Error ' -e '# Fatal' -e '# Failed' -C 10 ${NAME}_modelsim.log`
SUCCESS=`grep 'SUCCESS' ${NAME}_${SIMULATOR}.log`
elif [[ "$SIMULATOR" == "xsim" ]]; then
ERRS=`grep -v ^# ${NAME}_xvlog.log | grep -w -i -e error -e fatal -e fatal_error -e failed -C 10`
ERRS=$ERRS`grep -v ^# ${NAME}_xelab.log | grep -w -i -e error -e fatal -e fatal_error -e failed -C 10`
ERRS=$ERRS`grep -v ^# ${NAME}_xsim.log | grep -w -i -e error -e fatal -e fatal_error -e failed -C 10`
SUCCESS=`grep 'SUCCESS' ${NAME}_xsim.log`
else
echo "XML file is generated only for 'modelsim' and 'xsim' simulators."
echo "Check that variable SIMULATOR is exported and is set to one of those."
fi
# If DURATION is not defined, try to extract it from log file. If it's not found, just use 0
if [[ -z ${DURATION+x} ]]; then
DURATION=$(grep -i 'elapsed' ${NAME}_${SIMULATOR}.log | cut -d ' ' -f '10')
if [[ -z "$DURATION" ]]; then DURATION="0";fi
fi
#Generate xml file
xmlFile="${NAME}.xml"
echo "<?xml version=\"1.0\" encoding=\"utf-8\"?>" > $xmlFile
echo -e "<testsuite>" >> $xmlFile
echo -e "\t<testcase name=\"${NAME}\" time=\"${DURATION}\" classname=\"component_tb\">" >> $xmlFile
if [[ "$ERRS" ]]; then
echo -e "\t\t<failure>\n\"$ERRS\"\n\t\t</failure>" >> $xmlFile
elif [[ "$SUCCESS" ]]; then
echo -e "\t\t<passed/>" >> $xmlFile
else #There is no error or 'SUCCESS' keyword in log file - set result to 'Skipped'
echo -e "<skipped>" >> $xmlFile
echo -e "\tThe log file does not contain any errors or 'SUCCESS' keyword." >> $xmlFile
echo -e "\tLog file was not created properly or the testbench is not automated" >> $xmlFile
echo -e "</skipped>" >> $xmlFile
fi
echo -e "\t</testcase>" >> $xmlFile
echo "</testsuite>" >> $xmlFile

View File

@ -1,23 +1,41 @@
NAME=`basename $0` export NAME=`basename $0`
# MODE not defined or defined to something else than 'batch'
if [[ -z ${MODE+x} ]] || [[ ! "$MODE" =~ "batch" ]]; then MODE="gui";fi
MODE="-"${MODE##*-} #remove any eventual extra dashes
case "$SIMULATOR" in case "$SIMULATOR" in
modelsim) modelsim)
# ModelSim flow # ModelSim flow
vlib work vlib work
vlog ${SOURCE} || exit 1 vlog ${SOURCE} || exit 1
vsim ${NAME} -do "add log /* -r; run -a" -gui || exit 1 vsim ${NAME} -do "add log /* -r; run -a" $MODE -logfile ${NAME}_modelsim.log || exit 1
;; ;;
xsim) xsim)
# xsim flow # XSim flow
xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE} xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE}
xelab -log ${NAME}_xelab.log -debug all ${NAME} xelab -log ${NAME}_xelab.log -debug all ${NAME}
xsim work.${NAME} -R if [[ "$MODE" == "-gui" ]]; then
echo "run all" > xsim_gui_cmd.tcl
xsim work.${NAME} -gui -tclbatch xsim_gui_cmd.tcl -log ${NAME}_xsim.log
else
xsim work.${NAME} -R -log ${NAME}_xsim.log
fi
;; ;;
xcelium)
# Xcelium flow
xmvlog -NOWARN NONPRT ${SOURCE} || exit 1
xmelab -access +rc ${NAME}
xmsim ${NAME} -gui || exit 1
;;
*) *)
#Icarus flow is the default
mkdir -p run mkdir -p run
mkdir -p vcd mkdir -p vcd
iverilog ${SOURCE} -o run/run_${NAME} $1 || exit 1 iverilog -o run/run_${NAME} -I.. ${SOURCE} $1 || exit 1
cd vcd cd vcd
../run/run_${NAME} ../run/run_${NAME}
;; ;;

View File

@ -14,4 +14,4 @@ SOURCE+=" ../../util_cdc/sync_data.v"
SOURCE+=" ../../util_cdc/sync_event.v" SOURCE+=" ../../util_cdc/sync_event.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -12,4 +12,4 @@ SOURCE+=" ../../util_cdc/sync_data.v"
SOURCE+=" ../../util_cdc/sync_event.v" SOURCE+=" ../../util_cdc/sync_event.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -4,4 +4,4 @@ SOURCE="crc12_tb.v"
SOURCE+=" ../jesd204_common/jesd204_crc12.v" SOURCE+=" ../jesd204_common/jesd204_crc12.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -15,4 +15,4 @@ SOURCE+=" ../../util_cdc/sync_bits.v"
SOURCE+=" ../../util_cdc/sync_event.v" SOURCE+=" ../../util_cdc/sync_event.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -4,4 +4,4 @@ SOURCE="jesd204_frame_align_replace_tb.v"
SOURCE+=" ../jesd204_common/jesd204_frame_align_replace.v" SOURCE+=" ../jesd204_common/jesd204_frame_align_replace.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -4,4 +4,4 @@ SOURCE="jesd204_frame_mark_tb.v"
SOURCE+=" ../jesd204_common/jesd204_frame_mark.v" SOURCE+=" ../jesd204_common/jesd204_frame_mark.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -13,4 +13,4 @@ SOURCE+=" ../jesd204_tx_static_config/jesd204_ilas_cfg_static.v"
SOURCE+=" ../../util_cdc/sync_bits.v" SOURCE+=" ../../util_cdc/sync_bits.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -14,4 +14,4 @@ SOURCE+=" ../jesd204_tx_static_config/jesd204_ilas_cfg_static.v"
SOURCE+=" ../../util_cdc/sync_bits.v" SOURCE+=" ../../util_cdc/sync_bits.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -1,30 +0,0 @@
NAME=`basename $0`
case "$SIMULATOR" in
modelsim)
# ModelSim flow
vlib work
vlog ${SOURCE} || exit 1
vsim ${NAME} -do "add log /* -r; run -a" -gui || exit 1
;;
xcelium)
# Xcelium flow
xmvlog -NOWARN NONPRT ${SOURCE} || exit 1
xmelab -access +rc ${NAME}
xmsim ${NAME} -gui || exit 1
;;
xsim)
# xsim flow
xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE}
xelab -log ${NAME}_xelab.log -debug all ${NAME}
xsim work.${NAME} -R
;;
*)
mkdir -p run
mkdir -p vcd
iverilog ${SOURCE} -o run/run_${NAME} $1 || exit 1
cd vcd
../run/run_${NAME}
;;
esac

View File

@ -4,4 +4,4 @@ SOURCE="rx_cgs_tb.v"
SOURCE+=" ../jesd204_rx/jesd204_rx_cgs.v" SOURCE+=" ../jesd204_rx/jesd204_rx_cgs.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -4,4 +4,4 @@ SOURCE="rx_ctrl_tb.v"
SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v" SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -7,4 +7,4 @@ SOURCE+=" ../jesd204_common/jesd204_scrambler.v"
SOURCE+=" ../jesd204_common/pipeline_stage.v" SOURCE+=" ../jesd204_common/pipeline_stage.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -9,4 +9,4 @@ SOURCE+=" ../jesd204_rx/jesd204_ilas_monitor.v ../jesd204_rx/align_mux.v ../jesd
SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v ../jesd204_rx/elastic_buffer.v" SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v ../jesd204_rx/elastic_buffer.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -4,4 +4,4 @@ SOURCE="scrambler_64b_tb.v"
SOURCE+=" ../jesd204_common/jesd204_scrambler_64b.v" SOURCE+=" ../jesd204_common/jesd204_scrambler_64b.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -4,4 +4,4 @@ SOURCE="scrambler_tb.v"
SOURCE+=" ../jesd204_common/jesd204_scrambler.v" SOURCE+=" ../jesd204_common/jesd204_scrambler.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -5,4 +5,4 @@ SOURCE+=" ../jesd204_soft_pcs_tx/jesd204_8b10b_encoder.v"
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v" SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -5,4 +5,4 @@ SOURCE+=" ../jesd204_soft_pcs_tx/jesd204_8b10b_encoder.v"
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v" SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -6,4 +6,4 @@ SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_soft_pcs_rx.v ../jesd204_soft_pcs_rx/je
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v" SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -4,4 +4,4 @@ SOURCE="soft_pcs_pattern_align_tb.v"
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v" SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -8,4 +8,4 @@ SOURCE+=" ../../util_cdc/sync_bits.v"
SOURCE+=" ../jesd204_common/pipeline_stage.v" SOURCE+=" ../jesd204_common/pipeline_stage.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -5,4 +5,4 @@ SOURCE+=" ../jesd204_tx/jesd204_tx_ctrl.v"
SOURCE+=" ../../util_cdc/sync_bits.v" SOURCE+=" ../../util_cdc/sync_bits.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -7,4 +7,4 @@ SOURCE+=" ../jesd204_tx_static_config/jesd204_tx_static_config.v ../jesd204_tx_s
SOURCE+=" ../../util_cdc/sync_bits.v" SOURCE+=" ../../util_cdc/sync_bits.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -9,4 +9,4 @@ SOURCE+=" ../util_pack_common/pack_shell.v"
SOURCE+=" ../../common/ad_perfect_shuffle.v" SOURCE+=" ../../common/ad_perfect_shuffle.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -108,6 +108,7 @@ module cpack_tb;
end end
end end
integer i;
integer j; integer j;
integer h; integer h;
@ -136,8 +137,6 @@ module cpack_tb;
end end
end end
integer i;
always @(posedge clk) begin always @(posedge clk) begin
if (reset == 1'b1) begin if (reset == 1'b1) begin
for (i = 0; i < NUM_OF_PORTS; i = i + 1) begin for (i = 0; i < NUM_OF_PORTS; i = i + 1) begin

View File

@ -1,34 +0,0 @@
NAME=`basename $0`
mkdir -p run
mkdir -p vcd
WARNINGS="-Wimplicit -Wportbind -Wselect-range -Wtimescale"
# These warnings are only available with version 11
iverilog -v 2>&1 | grep -o "version 1[^0]" > /dev/null
if [[ $? = 0 ]]; then
WARNINGS+=" -Wfloating-nets -Wanachronisms -Wimplicit-dimensions"
fi
# Can be overwritten using a environment variables
NUM_CHANNELS=${NUM_CHANNELS:-"1 2 4 8 16 32"}
SAMPLES_PER_CHANNEL=${SAMPLES_PER_CHANNEL:-1}
ENABLE_RANDOM=${ENABLE_RANDOM:-0}
VCD=${VCD:-0}
for i in ${NUM_CHANNELS}; do
if [[ $VCD = 0 ]]; then
VCD_FILE='""';
else
VCD_FILE='"'${NAME}_${SAMPLES_PER_CHANNEL}_${i}'.vcd"'
fi
echo Testing $i Channels...
iverilog ${WARNINGS} ${SOURCE} -o run/run_${NAME}_${i} $1 \
-P ${NAME}.NUM_OF_CHANNELS=${i} \
-P ${NAME}.SAMPLES_PER_CHANNEL=${SAMPLES_PER_CHANNEL} \
-P ${NAME}.ENABLE_RANDOM=${ENABLE_RANDOM} \
-P ${NAME}.VCD_FILE=${VCD_FILE} \
|| exit 1
(cd vcd; vvp -N ../run/run_${NAME}_${i})
done

View File

@ -9,4 +9,4 @@ SOURCE+=" ../util_pack_common/pack_shell.v"
SOURCE+=" ../../common/ad_perfect_shuffle.v" SOURCE+=" ../../common/ad_perfect_shuffle.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh

View File

@ -35,7 +35,7 @@
`timescale 1ns/100ps `timescale 1ns/100ps
module upack2_underflow_tb; module underflow_tb;
parameter VCD_FILE = {`__FILE__,"cd"}; parameter VCD_FILE = {`__FILE__,"cd"};
parameter NUM_OF_CHANNELS = 8; parameter NUM_OF_CHANNELS = 8;
parameter SAMPLES_PER_CHANNEL = 4; parameter SAMPLES_PER_CHANNEL = 4;

View File

@ -9,4 +9,4 @@ SOURCE+=" ../util_pack_common/pack_shell.v"
SOURCE+=" ../../common/ad_perfect_shuffle.v" SOURCE+=" ../../common/ad_perfect_shuffle.v"
cd `dirname $0` cd `dirname $0`
source run_tb.sh source ../../common/tb/run_tb.sh