Testbenches: Unify and optimize HDL testbenches
Create a common 'run_tb.sh' script to be called by every testbench. Unify file and testbenches names. Fix util_pack/cpack_tb. Add parameters '-batch' and '-gui' for modelsim and xsim simulators (default is gui) Add ascript for that generates output in xml format (used by CI tools).main
parent
c235e5e583
commit
37238916df
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@ -16,4 +16,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -35,7 +35,7 @@
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`timescale 1ns/100ps
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`timescale 1ns/100ps
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module dmac_dma_read_shutdown_tb;
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module dma_read_shutdown_tb;
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter VCD_FILE = {`__FILE__,"cd"};
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`include "tb_base.v"
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`include "tb_base.v"
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@ -15,4 +15,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -35,7 +35,7 @@
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`timescale 1ns/100ps
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`timescale 1ns/100ps
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module dmac_dma_read_tb;
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module dma_read_tb;
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter WIDTH_DEST = 32;
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parameter WIDTH_DEST = 32;
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parameter WIDTH_SRC = 32;
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parameter WIDTH_SRC = 32;
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@ -16,4 +16,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -35,7 +35,7 @@
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`timescale 1ns/100ps
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`timescale 1ns/100ps
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module dmac_dma_write_shutdown_tb;
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module dma_write_shutdown_tb;
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter VCD_FILE = {`__FILE__,"cd"};
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`include "tb_base.v"
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`include "tb_base.v"
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@ -15,4 +15,4 @@ SOURCE+=" ../../util_cdc/sync_event.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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SOURCE+=" ../../common/ad_mem_asym.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -35,7 +35,7 @@
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`timescale 1ns/100ps
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`timescale 1ns/100ps
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module dmac_dma_write_tb;
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module dma_write_tb;
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter WIDTH_DEST = 32;
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parameter WIDTH_DEST = 32;
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parameter WIDTH_SRC = 32;
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parameter WIDTH_SRC = 32;
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@ -4,7 +4,7 @@ SOURCE="regmap_tb.v"
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SOURCE+=" ../axi_dmac_regmap.v ../axi_dmac_regmap_request.v"
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SOURCE+=" ../axi_dmac_regmap.v ../axi_dmac_regmap_request.v"
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SOURCE+=" ../../common/up_axi.v"
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SOURCE+=" ../../common/up_axi.v"
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SOURCE+=" ../../util_axis_fifo/util_axis_fifo.v"
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SOURCE+=" ../../util_axis_fifo/util_axis_fifo.v"
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SOURCE+=" ../../util_axis_fifo/address_sync.v"
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SOURCE+=" ../../util_axis_fifo/util_axis_fifo_address_generator.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -35,7 +35,7 @@
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`timescale 1ns/100ps
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`timescale 1ns/100ps
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module dmac_regmap_tb;
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module regmap_tb;
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter VCD_FILE = {`__FILE__,"cd"};
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`define TIMEOUT 1000000
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`define TIMEOUT 1000000
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@ -5,4 +5,4 @@ SOURCE+=" ../axi_dmac_reset_manager.v"
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SOURCE+=" ../../util_cdc/sync_bits.v"
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SOURCE+=" ../../util_cdc/sync_bits.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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`timescale 1ns/100ps
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`timescale 1ns/100ps
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module dmac_reset_manager_tb;
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module reset_manager_tb;
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parameter VCD_FILE = {`__FILE__,"cd"};
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parameter VCD_FILE = {`__FILE__,"cd"};
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`define TIMEOUT 1000000
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`define TIMEOUT 1000000
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@ -1,24 +0,0 @@
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NAME=`basename $0`
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case "$SIMULATOR" in
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modelsim)
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# ModelSim flow
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vlib work
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vlog ${SOURCE} || exit 1
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vsim "dmac_"${NAME} -do "add log /* -r; run -a" -gui || exit 1
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;;
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xsim)
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# xsim flow
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xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE}
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xelab -log ${NAME}_xelab.log -debug all dmac_${NAME}
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xsim work.dmac_${NAME} -R
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;;
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*)
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#Icarus flow is the default
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mkdir -p run
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mkdir -p vcd
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iverilog -o run/run_${NAME} -I.. ${SOURCE} $1 || exit 1
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cd vcd
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../run/run_${NAME}
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;;
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esac
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@ -0,0 +1,39 @@
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#!/bin/bash
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# Depending on simulator, search for errors or 'SUCCESS' keyword in specific log
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if [[ "$SIMULATOR" == "modelsim" ]]; then
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ERRS=`grep -i -e '# Error ' -e '# Fatal' -e '# Failed' -C 10 ${NAME}_modelsim.log`
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SUCCESS=`grep 'SUCCESS' ${NAME}_${SIMULATOR}.log`
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elif [[ "$SIMULATOR" == "xsim" ]]; then
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ERRS=`grep -v ^# ${NAME}_xvlog.log | grep -w -i -e error -e fatal -e fatal_error -e failed -C 10`
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ERRS=$ERRS`grep -v ^# ${NAME}_xelab.log | grep -w -i -e error -e fatal -e fatal_error -e failed -C 10`
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ERRS=$ERRS`grep -v ^# ${NAME}_xsim.log | grep -w -i -e error -e fatal -e fatal_error -e failed -C 10`
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SUCCESS=`grep 'SUCCESS' ${NAME}_xsim.log`
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else
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echo "XML file is generated only for 'modelsim' and 'xsim' simulators."
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echo "Check that variable SIMULATOR is exported and is set to one of those."
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fi
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# If DURATION is not defined, try to extract it from log file. If it's not found, just use 0
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if [[ -z ${DURATION+x} ]]; then
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DURATION=$(grep -i 'elapsed' ${NAME}_${SIMULATOR}.log | cut -d ' ' -f '10')
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if [[ -z "$DURATION" ]]; then DURATION="0";fi
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fi
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#Generate xml file
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xmlFile="${NAME}.xml"
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echo "<?xml version=\"1.0\" encoding=\"utf-8\"?>" > $xmlFile
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echo -e "<testsuite>" >> $xmlFile
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echo -e "\t<testcase name=\"${NAME}\" time=\"${DURATION}\" classname=\"component_tb\">" >> $xmlFile
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if [[ "$ERRS" ]]; then
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echo -e "\t\t<failure>\n\"$ERRS\"\n\t\t</failure>" >> $xmlFile
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elif [[ "$SUCCESS" ]]; then
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echo -e "\t\t<passed/>" >> $xmlFile
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else #There is no error or 'SUCCESS' keyword in log file - set result to 'Skipped'
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echo -e "<skipped>" >> $xmlFile
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echo -e "\tThe log file does not contain any errors or 'SUCCESS' keyword." >> $xmlFile
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echo -e "\tLog file was not created properly or the testbench is not automated" >> $xmlFile
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echo -e "</skipped>" >> $xmlFile
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fi
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echo -e "\t</testcase>" >> $xmlFile
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echo "</testsuite>" >> $xmlFile
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NAME=`basename $0`
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export NAME=`basename $0`
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# MODE not defined or defined to something else than 'batch'
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if [[ -z ${MODE+x} ]] || [[ ! "$MODE" =~ "batch" ]]; then MODE="gui";fi
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MODE="-"${MODE##*-} #remove any eventual extra dashes
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case "$SIMULATOR" in
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case "$SIMULATOR" in
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modelsim)
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modelsim)
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# ModelSim flow
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# ModelSim flow
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vlib work
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vlib work
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vlog ${SOURCE} || exit 1
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vlog ${SOURCE} || exit 1
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vsim ${NAME} -do "add log /* -r; run -a" -gui || exit 1
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vsim ${NAME} -do "add log /* -r; run -a" $MODE -logfile ${NAME}_modelsim.log || exit 1
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;;
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;;
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xsim)
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xsim)
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# xsim flow
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# XSim flow
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xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE}
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xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE}
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xelab -log ${NAME}_xelab.log -debug all ${NAME}
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xelab -log ${NAME}_xelab.log -debug all ${NAME}
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xsim work.${NAME} -R
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if [[ "$MODE" == "-gui" ]]; then
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echo "run all" > xsim_gui_cmd.tcl
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xsim work.${NAME} -gui -tclbatch xsim_gui_cmd.tcl -log ${NAME}_xsim.log
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else
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xsim work.${NAME} -R -log ${NAME}_xsim.log
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fi
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;;
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;;
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xcelium)
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# Xcelium flow
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xmvlog -NOWARN NONPRT ${SOURCE} || exit 1
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xmelab -access +rc ${NAME}
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xmsim ${NAME} -gui || exit 1
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;;
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*)
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*)
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#Icarus flow is the default
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mkdir -p run
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mkdir -p run
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mkdir -p vcd
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mkdir -p vcd
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iverilog ${SOURCE} -o run/run_${NAME} $1 || exit 1
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iverilog -o run/run_${NAME} -I.. ${SOURCE} $1 || exit 1
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cd vcd
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cd vcd
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../run/run_${NAME}
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../run/run_${NAME}
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;;
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;;
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SOURCE+=" ../../util_cdc/sync_event.v"
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SOURCE+=" ../../util_cdc/sync_event.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -12,4 +12,4 @@ SOURCE+=" ../../util_cdc/sync_data.v"
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SOURCE+=" ../../util_cdc/sync_event.v"
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SOURCE+=" ../../util_cdc/sync_event.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -4,4 +4,4 @@ SOURCE="crc12_tb.v"
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SOURCE+=" ../jesd204_common/jesd204_crc12.v"
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SOURCE+=" ../jesd204_common/jesd204_crc12.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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SOURCE+=" ../../util_cdc/sync_event.v"
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SOURCE+=" ../../util_cdc/sync_event.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -4,4 +4,4 @@ SOURCE="jesd204_frame_align_replace_tb.v"
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SOURCE+=" ../jesd204_common/jesd204_frame_align_replace.v"
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SOURCE+=" ../jesd204_common/jesd204_frame_align_replace.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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SOURCE+=" ../jesd204_common/jesd204_frame_mark.v"
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SOURCE+=" ../jesd204_common/jesd204_frame_mark.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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SOURCE+=" ../../util_cdc/sync_bits.v"
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SOURCE+=" ../../util_cdc/sync_bits.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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SOURCE+=" ../../util_cdc/sync_bits.v"
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SOURCE+=" ../../util_cdc/sync_bits.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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NAME=`basename $0`
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case "$SIMULATOR" in
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modelsim)
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# ModelSim flow
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vlib work
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vlog ${SOURCE} || exit 1
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vsim ${NAME} -do "add log /* -r; run -a" -gui || exit 1
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;;
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xcelium)
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# Xcelium flow
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xmvlog -NOWARN NONPRT ${SOURCE} || exit 1
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xmelab -access +rc ${NAME}
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xmsim ${NAME} -gui || exit 1
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;;
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xsim)
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# xsim flow
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xvlog -log ${NAME}_xvlog.log --sourcelibdir . ${SOURCE}
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xelab -log ${NAME}_xelab.log -debug all ${NAME}
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xsim work.${NAME} -R
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;;
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*)
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mkdir -p run
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mkdir -p vcd
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iverilog ${SOURCE} -o run/run_${NAME} $1 || exit 1
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cd vcd
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../run/run_${NAME}
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;;
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esac
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SOURCE+=" ../jesd204_rx/jesd204_rx_cgs.v"
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SOURCE+=" ../jesd204_rx/jesd204_rx_cgs.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v"
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SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -7,4 +7,4 @@ SOURCE+=" ../jesd204_common/jesd204_scrambler.v"
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SOURCE+=" ../jesd204_common/pipeline_stage.v"
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SOURCE+=" ../jesd204_common/pipeline_stage.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -9,4 +9,4 @@ SOURCE+=" ../jesd204_rx/jesd204_ilas_monitor.v ../jesd204_rx/align_mux.v ../jesd
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SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v ../jesd204_rx/elastic_buffer.v"
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SOURCE+=" ../jesd204_rx/jesd204_rx_ctrl.v ../jesd204_rx/elastic_buffer.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -4,4 +4,4 @@ SOURCE="scrambler_64b_tb.v"
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SOURCE+=" ../jesd204_common/jesd204_scrambler_64b.v"
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SOURCE+=" ../jesd204_common/jesd204_scrambler_64b.v"
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cd `dirname $0`
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cd `dirname $0`
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source run_tb.sh
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source ../../common/tb/run_tb.sh
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@ -4,4 +4,4 @@ SOURCE="scrambler_tb.v"
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SOURCE+=" ../jesd204_common/jesd204_scrambler.v"
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SOURCE+=" ../jesd204_common/jesd204_scrambler.v"
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||||||
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|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -5,4 +5,4 @@ SOURCE+=" ../jesd204_soft_pcs_tx/jesd204_8b10b_encoder.v"
|
||||||
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v"
|
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -5,4 +5,4 @@ SOURCE+=" ../jesd204_soft_pcs_tx/jesd204_8b10b_encoder.v"
|
||||||
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v"
|
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_8b10b_decoder.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -6,4 +6,4 @@ SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_soft_pcs_rx.v ../jesd204_soft_pcs_rx/je
|
||||||
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v"
|
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -4,4 +4,4 @@ SOURCE="soft_pcs_pattern_align_tb.v"
|
||||||
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v"
|
SOURCE+=" ../jesd204_soft_pcs_rx/jesd204_pattern_align.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -8,4 +8,4 @@ SOURCE+=" ../../util_cdc/sync_bits.v"
|
||||||
SOURCE+=" ../jesd204_common/pipeline_stage.v"
|
SOURCE+=" ../jesd204_common/pipeline_stage.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -5,4 +5,4 @@ SOURCE+=" ../jesd204_tx/jesd204_tx_ctrl.v"
|
||||||
SOURCE+=" ../../util_cdc/sync_bits.v"
|
SOURCE+=" ../../util_cdc/sync_bits.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -7,4 +7,4 @@ SOURCE+=" ../jesd204_tx_static_config/jesd204_tx_static_config.v ../jesd204_tx_s
|
||||||
SOURCE+=" ../../util_cdc/sync_bits.v"
|
SOURCE+=" ../../util_cdc/sync_bits.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -9,4 +9,4 @@ SOURCE+=" ../util_pack_common/pack_shell.v"
|
||||||
SOURCE+=" ../../common/ad_perfect_shuffle.v"
|
SOURCE+=" ../../common/ad_perfect_shuffle.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -108,6 +108,7 @@ module cpack_tb;
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
integer i;
|
||||||
integer j;
|
integer j;
|
||||||
integer h;
|
integer h;
|
||||||
|
|
||||||
|
@ -136,8 +137,6 @@ module cpack_tb;
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
integer i;
|
|
||||||
|
|
||||||
always @(posedge clk) begin
|
always @(posedge clk) begin
|
||||||
if (reset == 1'b1) begin
|
if (reset == 1'b1) begin
|
||||||
for (i = 0; i < NUM_OF_PORTS; i = i + 1) begin
|
for (i = 0; i < NUM_OF_PORTS; i = i + 1) begin
|
||||||
|
|
|
@ -1,34 +0,0 @@
|
||||||
NAME=`basename $0`
|
|
||||||
|
|
||||||
mkdir -p run
|
|
||||||
mkdir -p vcd
|
|
||||||
|
|
||||||
WARNINGS="-Wimplicit -Wportbind -Wselect-range -Wtimescale"
|
|
||||||
|
|
||||||
# These warnings are only available with version 11
|
|
||||||
iverilog -v 2>&1 | grep -o "version 1[^0]" > /dev/null
|
|
||||||
if [[ $? = 0 ]]; then
|
|
||||||
WARNINGS+=" -Wfloating-nets -Wanachronisms -Wimplicit-dimensions"
|
|
||||||
fi
|
|
||||||
|
|
||||||
# Can be overwritten using a environment variables
|
|
||||||
NUM_CHANNELS=${NUM_CHANNELS:-"1 2 4 8 16 32"}
|
|
||||||
SAMPLES_PER_CHANNEL=${SAMPLES_PER_CHANNEL:-1}
|
|
||||||
ENABLE_RANDOM=${ENABLE_RANDOM:-0}
|
|
||||||
VCD=${VCD:-0}
|
|
||||||
|
|
||||||
for i in ${NUM_CHANNELS}; do
|
|
||||||
if [[ $VCD = 0 ]]; then
|
|
||||||
VCD_FILE='""';
|
|
||||||
else
|
|
||||||
VCD_FILE='"'${NAME}_${SAMPLES_PER_CHANNEL}_${i}'.vcd"'
|
|
||||||
fi
|
|
||||||
echo Testing $i Channels...
|
|
||||||
iverilog ${WARNINGS} ${SOURCE} -o run/run_${NAME}_${i} $1 \
|
|
||||||
-P ${NAME}.NUM_OF_CHANNELS=${i} \
|
|
||||||
-P ${NAME}.SAMPLES_PER_CHANNEL=${SAMPLES_PER_CHANNEL} \
|
|
||||||
-P ${NAME}.ENABLE_RANDOM=${ENABLE_RANDOM} \
|
|
||||||
-P ${NAME}.VCD_FILE=${VCD_FILE} \
|
|
||||||
|| exit 1
|
|
||||||
(cd vcd; vvp -N ../run/run_${NAME}_${i})
|
|
||||||
done
|
|
|
@ -9,4 +9,4 @@ SOURCE+=" ../util_pack_common/pack_shell.v"
|
||||||
SOURCE+=" ../../common/ad_perfect_shuffle.v"
|
SOURCE+=" ../../common/ad_perfect_shuffle.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
|
@ -35,7 +35,7 @@
|
||||||
|
|
||||||
`timescale 1ns/100ps
|
`timescale 1ns/100ps
|
||||||
|
|
||||||
module upack2_underflow_tb;
|
module underflow_tb;
|
||||||
parameter VCD_FILE = {`__FILE__,"cd"};
|
parameter VCD_FILE = {`__FILE__,"cd"};
|
||||||
parameter NUM_OF_CHANNELS = 8;
|
parameter NUM_OF_CHANNELS = 8;
|
||||||
parameter SAMPLES_PER_CHANNEL = 4;
|
parameter SAMPLES_PER_CHANNEL = 4;
|
||||||
|
|
|
@ -9,4 +9,4 @@ SOURCE+=" ../util_pack_common/pack_shell.v"
|
||||||
SOURCE+=" ../../common/ad_perfect_shuffle.v"
|
SOURCE+=" ../../common/ad_perfect_shuffle.v"
|
||||||
|
|
||||||
cd `dirname $0`
|
cd `dirname $0`
|
||||||
source run_tb.sh
|
source ../../common/tb/run_tb.sh
|
||||||
|
|
Loading…
Reference in New Issue