jesd204: tx_ctrl: Fix status_sync assignment
The SYNC signal that gets reported through the status interface should be the output (second stage) of the synchronizer circuit. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
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1f2e189ff2
commit
369fe69d34
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@ -94,7 +94,7 @@ always @(posedge clk) begin
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sync_sync <= {sync_sync[0],sync};
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end
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assign status_sync = sync_sync;
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assign status_sync = sync_sync[1];
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always @(posedge clk) begin
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if (reset == 1'b1) begin
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